參數(shù)資料
型號(hào): DC939A
廠商: Linear Technology
文件頁(yè)數(shù): 28/42頁(yè)
文件大?。?/td> 0K
描述: BOARD DELTA SIGMA ADC LTC2484
軟件下載: QuikEval System
設(shè)計(jì)資源: DC939A Design File
DC939A Schematic
標(biāo)準(zhǔn)包裝: 1
系列: Easy Drive™, QuikEval™
ADC 的數(shù)量: 1
位數(shù): 24
采樣率(每秒): 6.8
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
工作溫度: 0°C ~ 70°C
已用 IC / 零件: LTC2484
已供物品:
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LTC2484
34
2484fd
APPLICATIONS INFORMATION
Normal Mode Rejection and Antialiasing
One of the advantages delta-sigma ADCs offer over
conventional ADCs is on-chip digital ltering. Combined
with a large oversampling ratio, the LTC2484 signicantly
simplies antialiasing lter requirements. Additionally,
the input current cancellation feature of the LTC2484 al-
lows external lowpass ltering without degrading the DC
performance of the device.
The SINC4 digital lter provides greater than 120dB normal
mode rejection at all frequencies except DC and integer
multiples of the modulator sampling frequency (fS). The
LTC2484’s autocalibration circuits further simplify the
antialiasing requirements by additional normal mode
signal ltering both in the analog and digital domain.
Independent of the operating mode, fS = 256 fN = 2048
fOUT(MAX) where fN is the notch frequency and fOUT(MAX)
is the maximum output data rate. In the internal oscilla-
tor mode with a 50Hz notch setting, fS = 12800Hz, with
50Hz/60Hz rejection, fS = 13960Hz and with a 60Hz notch
setting fS = 15360Hz. In the external oscillator mode, fS =
fEOSC/20. The performance of the normal mode rejection
is shown in Figures 30 and 31.
In 1x speed mode, the regions of low rejection occurring
at integer multiples of fS have a very narrow bandwidth.
Magnied details of the normal mode rejection curves
are shown in Figure 32 (rejection near DC) and Figure 33
(rejection at fS = 256fN) where fN represents the notch
frequency. These curves have been derived for the exter-
nal oscillator mode but they can be used in all operating
modes by appropriately selecting the fN value.
The user can expect to achieve this level of performance
using the internal oscillator as it is demonstrated by
Figures 34, 35 and 36. Typical measured values of the
normal mode rejection of the LTC2484 operating with an
internal oscillator and a 60Hz notch setting are shown in
Figure 34 superimposed over the theoretical calculated
curve. Similarly, the measured normal mode rejection of
the LTC2484 for the 50Hz rejection mode and 50Hz/60Hz
rejection mode are shown in Figures 35 and 36.
As a result of these remarkable normal mode specica-
tions, minimal (if any) antialias ltering is required in front
of the LTC2484. If passive RC components are placed in
front of the LTC2484, the input dynamic current should
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0fS 2fS 3fS 4fS 5fS 6fS 7fS 8fS 9fS10fS11fS12fS
INPUT
NORMAL
MODE
REJECTION
(dB)
2484 F30
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0fS
INPUT
NORMAL
MODE
REJECTION
(dB)
2484 F31
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
2fS 3fS 4fS 5fS 6fS 7fS 8fS 9fS 10fS
Figure 30. Input Normal Mode Rejection,
Internal Oscillator and 50Hz Notch Mode
Figure 31. Input Normal Mode Rejection, Internal
Oscillator and 60Hz Notch Mode of External Oscillator
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