參數(shù)資料
型號(hào)： DC939A
廠商： Linear Technology
文件頁(yè)數(shù)： 26/42頁(yè)
文件大小： 0K
描述： BOARD DELTA SIGMA ADC LTC2484
軟件下載： QuikEval System
設(shè)計(jì)資源： DC939A Design File
DC939A Schematic
標(biāo)準(zhǔn)包裝： 1
系列： Easy Drive™, QuikEval™
ADC 的數(shù)量： 1
位數(shù)： 24
采樣率（每秒）： 6.8
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
工作溫度： 0°C ~ 70°C
已用 IC / 零件： LTC2484
已供物品： 板
相關(guān)產(chǎn)品： LTC2484CDD#TRPBF-ND - IC ADC 24BIT 10-DFN
LTC2484IDD#TRPBF-ND - IC ADC 24BIT 10-DFN
LTC2484IDD#PBF-ND - IC ADC 24BIT 10-DFN
LTC2484CDD#PBF-ND - IC ADC 24BIT 10-DFN
LTC2484
32
2484fd
APPLICATIONS INFORMATION
second, the user is advised to maximize the power supply
voltage used and to limit the maximum ambient operating
temperature. In certain circumstances, a reduction of the
differential reference voltage may be benecial.
Input Bandwidth
The combined effect of the internal SINC4 digital lter and
of the analog and digital autocalibration circuits determines
the LTC2484 input bandwidth. When the internal oscillator
OUTPUT DATA RATE (READINGS/SEC)
0
10
RESOLUTION
(BITS)
12
16
18
22
10
50
70
2484 F24
14
20
40
90 100
20 30
60
80
TA = 85°C
TA = 25°C
VIN(CM) = VREF(CM)
VCC = VREF = 5V
fO = EXT CLOCK
RES = LOG 2 (VREF/INLMAX)
Figure 24. Resolution (INLRMS ≤ 1LSB)
vs Output Data Rate and Temperature
OUTPUT DATA RATE (READINGS/SEC)
0
–10
OFFSET
ERROR
(ppm
OF
V
REF
)
–5
5
10
20
10
50
70
2484 F25
0
15
40
90 100
20 30
60
80
VCC = 5V, VREF = 2.5V
VCC = VREF = 5V
VIN(CM) = VREF(CM)
VIN = 0V
fO = EXT CLOCK
TA = 25°C
Figure 25. Offset Error vs Output
Data Rate and Reference Voltage
Figure 26. Resolution (NoiseRMS ≤ 1LSB)
vs Output Data Rate and Reference Voltage
Figure 27. Resolution (INLRMS ≤ 1LSB) vs
Output Data Rate and Reference Voltage
OUTPUT DATA RATE (READINGS/SEC)
0
10
RESOLUTION
(BITS)
12
16
18
20
24
10
50
70
2484 F26
14
22
40
90 100
20 30
60
80
VIN(CM) = VREF(CM)
VIN = 0V
fO = EXT CLOCK
TA = 25°C
RES = LOG 2 (VREF/NOISERMS)
VCC = 5V, VREF = 2.5V
VCC = VREF = 5V
OUTPUT DATA RATE (READINGS/SEC)
0
10
RESOLUTION
(BITS)
12
16
18
22
10
50
70
2484 F27
14
20
40
90 100
20 30
60
80
VCC = 5V, VREF = 2.5V
VCC = VREF = 5V
VIN(CM) = VREF(CM)
VIN = 0V
REF– = GND
fO = EXT CLOCK
TA = 25°C
RES = LOG 2 (VREF/INLMAX)
is used with the notch set at 60Hz, the 3dB input bandwidth
is 3.63Hz. When the internal oscillator is used with the
notch set at 50Hz, the 3dB input bandwidth is 3.02Hz. If
an external conversion clock generator of frequency fEOSC
is connected to the fO pin, the 3dB input bandwidth is 11.8
10–6 fEOSC.
Due to the complex ltering and calibration algorithms
utilized, the converter input bandwidth is not modeled
very accurately by a rst order lter with the pole located
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