參數(shù)資料
型號(hào)： DAC5674IPHPRG4
廠商： Texas Instruments
文件頁數(shù)： 19/39頁
文件大?。?/td> 0K
描述： IC DAC 14BIT 400MSPS 48-HTQFP
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 1,000
系列： CommsDAC™
設(shè)置時(shí)間： 20ns
位數(shù)： 14
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 550mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 48-HTQFP（7x7）
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電流，單極
采樣率（每秒）： 400M
配用： 296-30860-ND - EVAL MODULE FOR DAC5674
DAC5674
SLWS148A SEPTEMBER 2003 REVISED OCTOBER 2005
www.ti.com
26
RT
50
CAC
0.01
F
CAC
0.01
F
RT
50
VTT
Differential
ECL
or
(LV)PECL
Source
+
CLK
CLKC
Figure 32. Driving the DAC5674 With Differential ECL/PECL Clock Source
RT
50
CAC
0.01
F
CAC
0.01
F
RT
50
VTT
Single-Ended
ECL
or
(LV)PECL
Source
ECL/PECL
Gate
CLK
CLKC
Figure 33. Driving the DAC5674 With a Single-Ended ECL/PECL Clock Source
Supply Inputs
The DAC5674 comprises separate analog and digital supplies at AVDD, DVDD, and IOVDD. These supplies
can range from 3 V to 3.6 V for AVDD, 1.65 to 1.95 V for DVDD, and 1.65 to 3.6 for IOVDD.
DAC Transfer Function
The DAC5674 delivers complementary output currents IOUT1 and IOUT2. The DAC supports straight binary
coding, with D13 being the MSB and D0 the LSB. Output current IOUT1 equals the approximate full-scale output
current when all input bits are set high, i.e., the binary input word has the decimal representation 16383.
Full-scale output current flows through terminal IOUT2 when all input bits are set low (mode 0, straight binary
input). The relation between IOUT1 and IOUT2 can thus be expressed as:
IOUT1
+ 2
N
* 1
2N
IOUT
FS * IOUT2
Where IOUTFS is the full-scale output current, N = 14 bits. The output currents can be expressed as:
IOUT1
+ IOUT
FS
CODE
16384
IOUT2
+ IOUT
FS
16383
* CODE
16384
Where CODE is the decimal representation of the DAC data input word. Output currents IOUT1 and IOUT2
drive resistor loads (RL) or a transformer with equivalent input load resistance (RL). This would translate into
single-ended voltages VOUT1 and VOUT2 at terminal IOUT1 and IOUT2, respectively, of:
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