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參數(shù)資料
型號(hào)： DAC312HSZ-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 7/14頁(yè)
文件大?。?/td> 0K
描述： IC DAC 12BIT MULT HS 20SOIC
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1,000
設(shè)置時(shí)間： 250ns
位數(shù)： 12
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 雙 ±
功率耗散（最大）： 375mW
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 20-SOIC W
包裝： 帶卷 (TR)
輸出數(shù)目和類(lèi)型： 2 電流，單極；2 電流，雙極
采樣率（每秒）： *
DAC312N
DAC312G
Parameter
Symbol
Conditions
Typical
Units
Reference Input
Slew Rate
dl/dt
8
mA/
s
Propagation Delay
tPLH, tPHL
Any Bit
25
ns
Settling Time
tS
To
±1/2 LSB, All
Bits Switched ON
250
ns
or OFF.
Full-Scale
TCIFS
±10
ppm/
°C
REV. C
–2–
DAC312–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(@ VS =
15 V, IREF = 1.0 mA, 0 C
≤ T
A
≤ +70 C for DAC312E and –40 C ≤ T
A
≤ +85 C
for DAC312F, DAC312H, unless otherwise noted. Output characteristics refer
to both IOUT and IOUT.)
DAC312E
DAC312F
DAC312H
Parameter
Symbol
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Units
Resolution
12
Bits
Monotonicity
12
Bits
Differential Nonlinearity
DNL
Deviation from Ideal
±0.0125
±0.0250
±0.0250 %FS
Step Size
2
±0.5
±1
LSB
Nonlinearity
INL
Deviation from Ideal
±0.05
%FS
Straight Line
1
Full-Scale Current
IFS
VREF = 10 V
R14 = R15 = 10 k
2
3.967
3.999
4.031
3.935 3.999
4.063
3.935 3.999
4.063
mA
Full-Scale Tempco
TCIFS
±5
±20
±10
±40
±80
ppm/
°C
±0.005
±0.002
±0.001
±0.004
±0.008
%FS/
°C
Output Voltage Compliance
VOC
DNL Specification Guaran-
teed over Compliance Range
–5
+10
–5
+10
–5
+10
V
Full-Scale Symmetry
IFSS
|IFS|–|IFS|
±0.4
±1
±0.4
±2
±0.4
±2
A
Zero-Scale Current
IZS
0.10
A
Settling Time
tS
To
±1/2 LSB, All Bits
Switched ON or OFF
1
250
500
250
500
250
500
ns
Propagation Delay–All Bits
tPLH
All Bits Switched 50% Point
25
50
25
50
25
50
ns
tPHL
Logic Swing to 50% Point
25
50
25
50
25
50
ns
Output
1
Output Resistance
RO
>10
M
Output Capacitance
COUT
20
pF
Logic Input
Levels “0”
VIL
VLC = GND
0.8
V
Levels “1”
VIH
VLC = GND
2
V
Logic Input Current
IIN
VIN = –5 to +18 V
40
A
Logic Input Swing
VIS
–5
+18
–5
+18
–5
+18
V
Reference Bias Current
I15
0
–0.5
–2
0
–0.5
–2
0
–0.5
–2
A
Reference Input
Slew Rate
dl/dt
R14(eq) = 800 , CC = 0 pF
1
4
8
48
mA/
s
Power Supply Sensitivity
PSSIFS+
V+ = +13.5 V to +16.5 V,
V– = –15 V
±0.0005 ±0.001
±0.0005 ±0.001 %FS/%V
PSSIFS–
V– = –13.5 V to –16.5 V,
V+ = +15 V
±0.00025 ±0.001
±0.00025 ±0.001 %FS/%V
Power Supply Range
V+
VOUT = 0 V
4.5
18
4.5
18
4.5
18
V
V–
VOUT = 0 V
–18
–10.8
–18
–10.8
–18
–10.8
V
Power Supply Current
I+
V+ = +5 V, V– = –15 V
3.3
7
3.3
7
3.3
7
mA
I–
V+ = +15 V, V– = –15 V
–13.9
–18
–13.9
–18
–13 9
–18
mA
I+
V+ = +5 V, V– = –15 V
3.9
7
3.9
7
3.9
7
mA
I–
V+ = +15 V, V– = –15 V
–13.9
–18
–13.9
–18
–13.9
–18
mA
Power Dissipation
Pd
V+ = +5 V, V– = –15 V
225
305
225
305
225
305
mW
V+ = +15 V, V– = –15 V
267
375
267
375
267
375
mW
TYPICAL ELECTRICAL CHARACTERISTICS @ 25 C; V
S =
15 V, and IREF = 1.0 mA, unless otherwise noted. Output
characteristics refer to both IOUT and IOUT.
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