參數(shù)資料
型號(hào): DAC1401D125HL
廠商: NXP SEMICONDUCTORS
元件分類: DAC
英文描述: Dual 14-bit DAC, up to 125 Msps
中文描述: PARALLEL, WORD INPUT LOADING, 0.043 us SETTLING TIME, 14-BIT DAC, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC. LQFP-48
文件頁數(shù): 20/25頁
文件大?。?/td> 359K
代理商: DAC1401D125HL
DAC1401D125_1
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 13 November 2008
20 of 25
NXP Semiconductors
DAC1401D125
Dual 14-bit DAC, up to 125 Msps
10.7.1
Differential output using transformer
The use of a differentially coupled transformer output (see
Figure 21
) provides optimum
distortion performance. In addition, it helps to match the impedance and provides
electrical isolation.
The center tap is grounded to allow the DC current flow to/from both outputs. If the center
tap is open, the differential resistor must be replaced by two resistors connected to
ground.
10.7.2
Single-ended output
Using a single load resistor on one current output will provide an unipolar output range,
typically from 0 V to 0.5 V with a 20 mA full-scale current at a 50
load.
The resistor on the other current output is 25
.
10.8 Power-down function
The DAC1404D125 has a power-down function to reduce the power consumption when it
is not active.
Fig 21. Differential output with transformer
001aai935
IOUTAN/
IOUTBN
Rdiff
Rload
IOUTAP/
IOUTBP
T1-1T
1:1
Fig 22. Single-ended output
001aai936
IOUTAN/
IOUTBN
50
20 mA
Z = 50
50
0 V to 0.5 V
IOUTAP/
IOUTBP
25
Table 9.
PWD
0
1
Power-down
Device function
active
not active
Power dissipation (typ)
185 mW
16.5 mW
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