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參數(shù)資料
| 型號： | DAC1205D650HW |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Dual 12-bit DAC, up to 650 Msps; 2x 4x and 8x interpolating |
| 封裝： | DAC1205D650HW/C1<SOT638-1 (HTQFP100)|<<http://www.nxp.com/packages/SOT638-1.html<1<Always Pb-free,;DAC1205D650HW/C1<SOT638-1 (HTQFP100)|<<http://www.nxp.com/packages/SOT6 |
| 文件頁數(shù)： | 19/43頁 |
| 文件大?。?/td> | 295K |
| 代理商： | DAC1205D650HW |
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DAC1205D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 13 September 2010
19 of 43
NXP Semiconductors
DAC1205D650
Dual 12-bit DAC, up to 650 Msps; 2
×
4
×
and 8
×
interpolating
Table 15.
Bit
7 to 0
Table 16.
Bit
7 to 0
Table 17.
Bit
7 to 0
Table 18.
Bit
7 to 0
Table 19.
Default settings are shown highlighted.
Bit
Symbol
7
DAC_A_PD
Table 20.
Bit
7 to 6
Table 21.
Bit
7 to 6
FREQNCO_UISB register (address 05h) bit description
Symbol
Access Value Description
FREQ_NCO[23:16]
R/W
-
upper intermediate 8 bits for the NCO
frequency setting
FREQNCO_MSB register (address 06h) bit description
Symbol
Access Value Description
FREQ_NCO[31:24]
R/W
-
most significant 8 bits for the NCO frequency
setting
PHINCO_LSB register (address 07h) bit description
Symbol
Access Value Description
PH_NCO[7:0]
R/W
-
lower 8 bits for the NCO phase setting
PHINCO_MSB register (address 08h) bit description
Symbol
Access Value Description
PH_NCO[15:8]
R/W
-
most significant 8 bits for the NCO phase setting
DAC_A_Cfg_1 register (address 09h) bit description
Access Value Description
R/W
0
1
R/W
0
1
R/W
-
DAC A power
on
off
DAC A Sleep mode
disabled
enabled
lower 5 bits for the DAC A offset
6
DAC_A_SLEEP
5 to 1
DAC_A_OFFSET[4:0]
DAC_A_Cfg_2 register (address 0Ah) bit description
Symbol
DAC_A_GAIN_COARSE[1:0
]
DAC_A_GAIN_FINE[5:0]
Access Value Description
R/W
-
least significant 2 bits for the DAC A gain
setting for coarse adjustment
the 6 bits for the DAC A gain fine
adjustment setting
5 to 0
R/W
-
DAC_A_Cfg_3 register (address 0Bh) bit description
Symbol
DAC_A_GAIN_COARSE[3:2
]
DAC_A_OFFSET[10:5]
Access
R/W
Value
-
Description
most significant 2 bits for the DAC A
gain setting for coarse adjustment
most significant 6 bits for the DAC A
offset
5 to 0
R/W
-
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DAC1205D650HW/C1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 12-bit DAC, up to 650 Msps; 2′ 4′ and 8′ interpolating |
| DAC1205D650HW/C1,5 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC IC DAC 12BIT 650MSPS DL RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC1205D650HW-C1 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC DAC RoHS:否 制造商:IDT 轉(zhuǎn)換器數(shù)量:2 DAC 輸出端數(shù)量:4 轉(zhuǎn)換速率:650 MSPs 分辨率:12 bit 接口類型:Serial, SPI 穩(wěn)定時間:20 ns 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-100 封裝: |
| DAC1205D650HW-C18 | 制造商:Integrated Device Technology Inc 功能描述:BST - Tape and Reel |
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