參數(shù)資料
型號(hào): DAC1201D125HL
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 12-bit DAC, up to 125 Msps
封裝: DAC1201D125HL/C1<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html<1<Always Pb-free,;DAC1201D125HL/C1<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2
文件頁(yè)數(shù): 18/26頁(yè)
文件大?。?/td> 274K
代理商: DAC1201D125HL
DAC1201D125_1
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 27 November 2008
18 of 26
NXP Semiconductors
DAC1201D125
Dual 12-bit DAC, up to 125 Msps
Table 7
shows the output current as a function of the input data, when I
O(fs)
= 20 mA.
10.5 Full-scale current adjustment
The DAC1201D125 integrates one 1.25 V reference and two current sources to adjust the
full-scale current in both DACs.
The internal reference configuration is shown in
Figure 19
.
The bias current is generated by the output of the internal regulator connected to the
inverting input of the internal operational amplifiers. The external resistors R
A
and R
B
are
connected to pins AVIRES and BVIRES, respectively. This configuration is optimal for
temperature drift compensation because the band gap can be matched with the voltage
on the feedback resistors.
The relationship between full-scale output current (I
O(fs)
) at the output of channel A or
channel B and the resistor is:
(2)
The output current of the two DACs is typically fixed at 20 mA when both resistors R
A
and
R
B
are set to 1.5 k
. The operational range of DAC1201D125 is from 2 mA to 20 mA.
It is recommended to decouple pin REFIO using a 100 nF capacitor.
Table 7.
Data
0
...
2047
...
4095
DAC transfer function
DA11/DB11 to DA0/DB0
0000 0000 0000
...
1000 0000 0000
...
1111 1111 1111
IOUTAP/IOUTBP
0 mA
...
10 mA
...
20 mA
IOUTAN/IOUTBN
20 mA
...
10 mA
...
0 mA
Fig 19. Internal reference configuration
001aai822
1.25 V REFERENCE
CURRENT
SOURCE
AGND
AGND
REFIO
AVIRES
BVIRES
RA
CURRENT
SOURCE
AGND
RB
100 nF
I
O fs
)
24V
R
A
------------------------
=
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