參數(shù)資料
型號(hào): DAC1201D125HL
廠商: NXP SEMICONDUCTORS
元件分類: DAC
英文描述: Dual 12-bit DAC, up to 125 Msps
中文描述: 12-BIT DAC, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT313-2, HTQFP-48
文件頁(yè)數(shù): 19/26頁(yè)
文件大?。?/td> 274K
代理商: DAC1201D125HL
DAC1201D125_1
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 27 November 2008
19 of 26
NXP Semiconductors
DAC1201D125
Dual 12-bit DAC, up to 125 Msps
An external reference can also be used for applications requiring higher accuracy or
precise current adjustment. Due to the high input impedance of pin REFIO, applying an
external source disables the band gap.
10.6 Gain control
Table 8
shows how to select the different gain control modes.
In Independent gain mode, both full-scale currents can be adjusted independently using
resistors R
A
on pin AVIRES and R
B
on pin BVIRES.
In Common gain mode, both full-scale currents are adjusted with the same resistor and
divided by two in both DACs.
10.7 Analog outputs
See
Figure 20
for the analog output circuit of one DAC. This circuit consists of a parallel
combination of PMOS current sources and associated switches for each segment.
Cascode source configuration enables the output impedance of the source to be
increased, thus improving the dynamic performance by reducing distortion.
The DAC1201D125 can be used with either:
a differential output, coupled to a transformer (or operational amplifier) to reduce
even-order harmonics and noise
a single-ended output for applications requiring unipolar voltage
A typical configuration is to use a 1 V p-p level on each output IOUTAP/IOUTBP and
IOUTAN/IOUTBN. Several combinations can be used but they must respect the voltage
compliance range.
Table 8.
GAINCTRL
Gain control
Mode
DAC A
full-scale control
AVIRES
AVIRES
DAC B
full-scale control
BVIRES
AVIRES
LOW
HIGH
independent gain control
common gain control
Fig 20. Equivalent analog output circuit
001aai821
RL
RL
AGND
AGND
IOUTAP/IOUTBP
IOUTAN/IOUTBN
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