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參數(shù)資料
| 型號(hào)： | CY7C43684 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(16K x36 x2 雙向同步先進(jìn)先出帶總線匹配) |
| 中文描述： | 16K的x36 x2雙向同步FIFO瓦特/總線匹配（16K的x36 x2雙向同步先進(jìn)先出帶總線匹配） |
| 文件頁(yè)數(shù)： | 1/37頁(yè) |
| 文件大?。?/td> | 581K |
| 代理商： | CY7C43684 |
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PRELIMINARY
256/512/1K/4K/16K x36 x2 Bidirectional
Synchronous FIFO w/ Bus Matching
Fully asynchronous and simultaneous read and write
operation permitted
Mailbox bypass register for each FIFO
Parallel and Serial Programmable Almost-Full and
Almost-Empty flags
Retransmit function
Standard or FWFT mode user selectable
Partial Reset
Big or Little Endian format for word or byte bus sizes
128-pin TQFP packaging
Pin-compatible, feature enhanced, density upgrade to
IDT723624/34/44 family
Easily expandable in width and depth
CY7C43624
CY7C43634/CY7C43644
CY7C43664/CY7C43684
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
September 13, 1999
Features
High-speed, low-power, Bidirectional, First-In First-Out
(FIFO) memories w/ bus matching capabilities
256x36x2 (CY7C43624)
512x36x2 (CY7C43634)
1Kx36x2 (CY7C43644)
4Kx36x2 (CY7C43664)
16Kx36x2 (CY7C43684)
0.35-micron CMOS for optimum speed/power
High-speed 133-MHz operation (7.5 ns read/write cycle
times)
Low power
—I
CC
= 100 mA
—I
SB
= 10 mA
Logic Block Diagram
Port A
Control
Logic
Port B
Control
Logic
Mail 1
Register
I
R
Write
Pointer
Read
Pointer
Status
Flag Logic
Programmable
Flag Offset
Registers
Timing
Mode
Status
Flag Logic
Write
Pointer
Read
Pointer
256/512/1K
4K/16K x36
Dual Ported
Memory
256/512/1K
4K/16K x36
Dual Ported
Memory
Mail 2
Register
O
R
I
R
FIFO1,
Mail 1
Reset
Logic
FIFO1,
Mail 1
Reset
Logic
CLKA
CSA
W/RA
ENA
MBA
RT2
MRS1
PRS1
FFA/IRA
AFA
SPM
FS0/SD
FS1/SEN
A
0–35
EFA/ORA
AEA
MBF2
MRS2
PRS2
FFB/IRB
AFB
BE/FWFT
B
0–35
CLKB
CSB
W/RB
ENB
MBB
RTI
BE
BM
SIZE
EFB/ORB
AEB
MBF1
O
R
B
36
36
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C43636 | 512 x36/x18x2 Tri Bus FIFO(512 x36/x18x2 三路總線 先進(jìn)先出) |
| CY7C43626 | 256 x36/x18x2 Tri Bus FIFO(256 x36/x18x2 三路總線先進(jìn)先出) |
| CY7C43646 | 1K x36/x18x2 Tri Bus FIFO(1K x36/x18x2 三路總線 先進(jìn)先出) |
| CY7C43666 | 4K x36/x18x2 Tri Bus FIFO(4K x36/x18x2 三路總線先進(jìn)先出) |
| CY7C43686 | 16K x36/x18x2 Tri Bus FIFO(16K x36/x18x2 三路總線先進(jìn)先出) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C43684-10AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43684AV-10AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Bi-Dir 16K x 36 x 2 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:3.3V BIDIR SYNC FIFO W/ BUS MATCHING 16KX32X2 - Bulk |
| CY7C43686-15AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43686AV-7AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Triple Depth/Width Tri-Bus 16K x 36/16K x 18 x 2 128-Pin TQFP |
| CY7C439-40DMB | 制造商:Cypress Semiconductor 功能描述: |
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