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參數(shù)資料
| 型號(hào)： | CY62167DV20 |
| 英文描述： | Memory |
| 中文描述： | 內(nèi)存 |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 153K |
| 代理商： | CY62167DV20 |
CY62147V18 MoBL2
6
Switching Waveforms
Notes:
11. Device is continuously selected. OE, CE = V
IL
.
12. WE is HIGH for read cycle.
13. Address valid prior to or coincident with CE transition LOW.
ADDRESS
DATA OUT
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
Read Cycle No. 1
[11, 12]
50%
50%
DATA VALID
t
RC
t
ACE
t
DBE
t
LZBE
t
LZCE
t
PU
DATA OUT
HIGH IMPEDANCE
IMPEDANCE
I
CC
I
SB
t
HZOE
t
HZCE
t
PD
OE
CE
HIGH
V
SUPPLY
CURRENT
Read Cycle No. 2
[12, 13]
t
HZBE
BHE/BLE
t
DOE
t
LZOE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62167DV20L-70BVI | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3.3V 16M-Bit 1M x 16 70ns 48-Pin VFBGA |
| CY62167DV20LL-55BVI | 制造商:Rochester Electronics LLC 功能描述:16M (1M X 16)- 2.0V SLOW ASYNCH SRAM - Bulk |
| CY62167DV20LL-5BVI | 制造商:Cypress Semiconductor 功能描述: |
| CY62167DV30L-70BVI | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3V 16M-Bit 1M x 16 70ns 48-Pin VFBGA |
| CY62167DV30LL-45ZI | 制造商:Cypress Semiconductor 功能描述: |
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