參數(shù)資料
型號(hào): CY39165Z676-125MBC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: PLD
英文描述: CPLDs at FPGA Densities
中文描述: LOADABLE PLD, 10 ns, PBGA676
封裝: 27 X 27 MM, 1.60 MM HEIGHT, 1 MM PITCH, FBGA-676
文件頁數(shù): 33/86頁
文件大?。?/td> 1212K
代理商: CY39165Z676-125MBC
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 33 of 86
Switching Waveforms
(continued)
CLOCK
A
n
A
n
B
n–1
B
n+1
t
CHMBDV
A
n–1
t
CHMBDV
t
CHMS
t
CHMS
ADDRESS B
ADDRESS
MATCH
Dual-Port Synchronous Address Match Busy Signal
ADDRESS A
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參數(shù)描述
CY39165Z676-125MBI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39165Z676-125MGC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39165Z676-125MGI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39165Z676-125NC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39165Z676-125NI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities