參數(shù)資料
型號： CY37064VP44-YMB
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： PLD
英文描述： EE PLD, 12 ns, CQCC44
封裝： CERAMIC, LCC-44
文件頁數(shù)： 7/66頁
文件大?。?/td> 1259K
代理商： CY37064VP44-YMB
Ultra37000 CPLD Family
15
5.0V Device Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
VOH
Output HIGH Voltage
VCC = Min. IOH = –3.2 mA (Com’l/Ind)
[4]
2.4
V
IOH = –2.0 mA (Mil)
[4]
2.4
V
VOHZ
Output HIGH Voltage with
Output Disabled[8]
VCC = Max. IOH = 0 A (Com’l)
[5]
4.2
V
IOH = 0 A (Ind/Mil)
[5]
4.5
V
IOH = –100 A (Com’l)
[5]
3.6
V
IOH = –150 A (Ind/Mil)
[5]
3.6
V
VOL
Output LOW Voltage
VCC = Min. IOL = 16 mA (Com’l/Ind)
[4]
0.5
V
IOL = 12 mA (Mil)
[4]
0.5
V
VIH
Input HIGH Voltage
Guaranteed Input Logical HIGH Voltage
for all Inputs[6]
2.0
VCCmax
V
VIL
Input LOW Voltage
Guaranteed Input Logical LOW Voltage
for all Inputs[6]
–0.5
0.8
V
IIX
Input Load Current
VI = GND OR VCC, Bus-Hold Disabled
–10
10
A
IOZ
Output Leakage Current
VO = GND or VCC, Output Disabled,
Bus-Hold Disabled
–50
50
A
IOS
Output Short Circuit
Current[7, 8]
VCC = Max., VOUT = 0.5V
–30
–160
mA
IBHL
Input Bus-Hold LOW
Sustaining Current
VCC = Min., VIL = 0.8V
+75
A
IBHH
Input Bus-Hold HIGH
Sustaining Current
VCC = Min., VIH = 2.0V
–75
A
IBHLO
Input Bus-Hold LOW Overdrive
Current
VCC = Max.
+500
A
IBHHO
Input Bus-Hold HIGH Overdrive
Current
VCC = Max.
–500
A
Inductance[8]
Parameter
Description
Test
Conditions
44-
Lead
TQFP
44-
Lead
PLCC
44-
Lead
CLCC
84-
Lead
PLCC
84-
Lead
CLCC
100-
Lead
TQFP
160-
Lead
TQFP
208-
Lead
PQFP
Unit
L
Maximum Pin
Inductance
VIN = 5.0V
at f = 1 MHz
2
5
2
8
5
8
9
11
nH
Capacitance[8]
Parameter
Description
Test Conditions
Max.
Unit
CI/O
Input/Output Capacitance
VIN = 5.0V at f = 1 MHz at TA = 25°C
10
pF
CCLK
Clock Signal Capacitance
VIN = 5.0V at f = 1 MHz at TA = 25°C
12
pF
CDP
Dual Function Pins[9]
VIN = 5.0V at f = 1 MHz at TA = 25°C
16
pF
Endurance Characteristics[8]
Parameter
Description
Test Conditions
Min.
Typ.
Unit
N
Minimum Reprogramming Cycles
Normal Programming Conditions[2]
1,000
10,000
Cycles
Notes:
4.
IOH = –2 mA, IOL = 2 mA for TDO.
5.
When the I/O is output disabled, the bus-hold circuit can weakly pull the I/O to above 3.6V if no leakage current is allowed. Note that all I/Os are output disabled
during ISR programming. Refer to the application note “Understanding Bus-Hold” for additional information.
6.
These are absolute values with respect to device ground. All overshoots due to system or tester noise are included.
7.
Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. VOUT = 0.5V has been chosen to avoid test
problems caused by tester ground degradation.
8.
Tested initially and after any design or process changes that may affect these parameters.
9.
Dual pins are I/O with JTAG pins.
相關(guān)PDF資料
PDF描述
CY37128VP84-83YMB EE PLD, 15 ns, CQCC84
CY74FCT162501ATPACT FCT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
CY74FCT16501ETPVC FCT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
CY74FCT16652CTPVCR FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
CY74FCT2244TQC FCT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY37064VP48-100BAC 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
CY37064VP48-100BAI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:5V, 3.3V, ISRTM High-Performance CPLDs
CY37064VP48-143BAC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:5V, 3.3V, ISRTM High-Performance CPLDs
CY37064VP84-100JC 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY37064VP84-100JI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:5V, 3.3V, ISRTM High-Performance CPLDs
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*