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參數(shù)資料
| 型號： | CY28419ZXCT |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 13/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK SERV CK419 56TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | * |
| PLL： | 是 |
| 輸入： | 晶體 |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:25 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 400MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
CY28419
........................Document #: 38-07444 Rev. *D Page 7 of 15
Crystal Recommendations
The CY28419 requires a Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28419 to operate at the wrong frequency and violate the
ppm specification. For most applications there is a 300-ppm
frequency shift between series and parallel crystals due to
incorrect loading.
Byte 6: Control Register 6
Bit
@Pup
Name
Description
70
REF
PCIF
PCI
3V66
USB_48
DOT_48
CPUT/C
SRCT/C
Test Clock Mode
0= Disabled, 1 = Enabled
6
0
Reserved, Set = 0
5
0
CPUC0, CPUT0
CPUC1, CPUT1
CPUC2, CPUT2
CPUC3, CPUT3
FS_A & FS_B Operation
0 = Normal, 1 = Test mode
4
0
SRCT, SRCC
SRC Frequency Select
0 = 100 MHz, 1 = 200 MHz
3
0
Reserved, Set = 0
2
0
PCIF
PCI
3V66
SRC(T/C)
CPUT/ C
Spread Spectrum Mode
0 = Spread Off, 1 = Spread On
1
REF_1
REF_1 Output Enable
0 = Disabled, 1 = Enabled
0
1
REF_0
REF_0 Output Enable
0 = Disabled, 1 = Enabled
Byte 7: Vendor ID
Bit
@Pup
Name
Description
7
0
Revision Code Bit 3
6
0
Revision Code Bit 2
5
0
Revision Code Bit 1
4
0
Revision Code Bit 0
3
1
Vendor ID Bit 3
2
0
Vendor ID Bit 2
1
0
Vendor ID Bit 1
0
Vendor ID Bit 0
Table 6. Crystal Recommendations
Frequency
(Fund)
Cut
Loading
Load Cap
Drive
(max.)
Shunt Cap
(max.)
Motional
(max.)
Tolerance
(max.)
Stability
(max.)
Aging
(max.)
14.31818 MHz
AT
Parallel
20 pF
0.1 mW
5 pF
0.016 pF
50 ppm
5 ppm
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