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參數(shù)資料
| 型號： | CY27EE16 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數(shù)： | 17/17頁 |
| 文件大?。?/td> | 163K |
| 代理商： | CY27EE16 |
CY27EE16ZE
Document #: 38-07440 Rev. *B
Page 17 of 17
Document History Page
Document Title: CY27EE16ZE 1 PLL In-System Programmable Clock Generator with Individual 16K EEPROM
Document Number: 38-07440
Issue
Date
Change
Description of Change
**
116411
10/01/02
CKN
New Data Sheet
*A
121903
12/14/02
RBI
Power-up requirements added to Operating Conditions information
*B
127953
07/01/03
IJATMP
Removed PRELIMINARY from all pages
Changed 18 bits to 18 kbits on first page
Added Note after last paragraph titled “To configure for PDM”
Changed Registers under “Write Protect (WP) Registers”
Added note to Ordering Information table to clarify factory-programmable
REV.
ECN NO.
Orig. of
相關PDF資料 |
PDF描述 |
|---|---|
| CY27EE16FZECT | 1 PLL In-System Programmable Clock Generator with Individual 16K EEPROM |
| CY27EE16ZE | CAT5E PATCH CORD 100MHZ 5 FOOT BEIGE |
| CY27EE16FZEC | 1 PLL In-System Programmable Clock Generator with Individual 16K EEPROM |
| CY27EE16FZEI | 1 PLL In-System Programmable Clock Generator with Individual 16K EEPROM |
| CY27EE16FZEIT | 1 PLL In-System Programmable Clock Generator with Individual 16K EEPROM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY27EE16FZEC | 制造商:Cypress Semiconductor 功能描述:Programmable PLL Clock Generator Single 20-Pin TSSOP |
| CY27EE16FZECT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1 PLL In-System Programmable Clock Generator with Individual 16K EEPROM |
| CY27EE16FZEI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1 PLL In-System Programmable Clock Generator with Individual 16K EEPROM |
| CY27EE16FZEIT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1 PLL In-System Programmable Clock Generator with Individual 16K EEPROM |
| CY27EE16FZXEC | 制造商:Cypress Semiconductor 功能描述:Programmable PLL Clock Generator Single 20-Pin TSSOP |
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