參數(shù)資料
型號(hào): CY2308SI-1H
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 時(shí)鐘及定時(shí)
英文描述: 3.3V Zero Delay Buffer
中文描述: 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封裝: 0.150 INCH, MS-012, SOIC-16
文件頁(yè)數(shù): 16/17頁(yè)
文件大?。?/td> 502K
代理商: CY2308SI-1H
CY2308
Document Number: 38-07146 Rev. *K
Page 8 of 17
t3
Rise time[16, 17]
(–1H, –5H)
Measured between 0.8 V and
2.0 V, 30 pF load
1.50
ns
t4
Fall time[16, 17]
(–1, –2, –3, –4)
Measured between 0.8 V and
2.0 V, 30 pF load
2.50
ns
t4
Fall time[16, 17]
(–1, –2, –3, –4)
Measured between 0.8 V and
2.0 V, 15 pF load
1.50
ns
t4
Fall time[16, 17]
(–1H, –5H)
Measured between 0.8 V and
2.0 V, 30 pF load
1.25
ns
t5
Output to output skew on same
Bank (–1, –2, –3, –4)[16, 17]
All outputs equally loaded
200
ps
Output to output skew
(–1H, –5H)
All outputs equally loaded
200
ps
Output Bank A to output
Bank B skew (–1, –4, –5H)
All outputs equally loaded
200
ps
Output Bank A to output
Bank B skew (–2, –3)
All outputs equally loaded
400
ps
t6
Delay, REF rising edge to
FBK rising edge[16, 17]
Measured at VDD/2
0
250
ps
t7
Device to device skew[16, 17] Measured at VDD/2 on the FBK
pins of devices
–0
700
ps
t8
Output slew rate[16, 17]
Measured between 0.8 V and
2.0 V on –1H, –5H device using
Test Circuit 2
1–
V/ns
tJ
Cycle to cycle Jitter[16, 17]
(–1, –1H, –4, –5H)
Measured at 66.67 MHz, loaded
outputs, 15 pF load
–75
200
ps
Measured at 66.67 MHz, loaded
outputs, 30 pF load
––
200
ps
Measured at 133.3 MHz, loaded
outputs, 15 pF load
––
100
ps
tJ
Cycle to cycle Jitter[16, 17]
(–2, –3)
Measured at 66.67 MHz, loaded
outputs, 30 pF load
––
400
ps
Measured at 66.67 MHz, loaded
outputs, 15 pF load
––
400
ps
tLOCK
PLL lock time[16, 17]
Stable power supply, valid clocks
presented on REF and FBK pins
––
1.0
ms
Switching Characteristics for Industrial Temperature Devices (continued)
Parameter[15]
Name
Test Conditions
Min
Typ
Max
Unit
Notes
16. Parameter is guaranteed by design and characterization. Not 100% tested in production.
17. All parameters are specified with loaded outputs.
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