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參數(shù)資料
| 型號： | CS5534-BSZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 3/17頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT 4CH W/LNA 24SSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 3.84k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 45mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個差分，單極；4 個差分，雙極 |
| 配用： | 598-1016-ND - EVAL BOARD FOR CS5534 |
IDT / ICS PCI EXPRESS JITTER ATTENUATOR
11
ICS9DB202CK-01 REV. B FEBRUARY 18, 2009
ICS9DB202-01
PCI EXPRESS JITTER ATTENUATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS9DB202-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS9DB202-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
DD_MAX
* (I
DD_MAX
+ I
DDA_MAX
)= 3.465V * (112mA + 22mA) = 464.3mW
Power (outputs)
MAX
= 44.5mW/Loaded Output pair
Total Power
_MAX
(3.465V, with all outputs switching) = 464.3mW + 44.5mW = 508.81mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in Section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air
flow and a multi-layer board, the appropriate value is 34.8°C/W per Table 5 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.509W * 34.8°C/W = 87.7°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 5. THERMAL RESISTANCE
θθθθθ
JA
FOR
32-PIN VFQFN, FORCED CONVECTION
θθθθθ
JA
0 Air Flow (Linear Feet per Minute)
0
Multi-Layer PCB, JEDEC Standard Test Boards
34.8C/W
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