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參數(shù)資料
| 型號： | CS5166HGDWR16 |
| 廠商： | ZF Electronics Corporation |
| 英文描述： | 5-Bit Synchronous CPU Controller with Power-Good and Current Limit |
| 中文描述： | 5位同步CPU，具有功率控制器，準確和電流限制 |
| 文件頁數(shù)： | 4/22頁 |
| 文件大?。?/td> | 435K |
| 代理商： | CS5166HGDWR16 |
C
4
Electrical Characteristics: 0
C < T
A
< 70
C; 0
C < T
J
< 125
C; 8V < V
CC
< 14V; 2.0V DAC Code
(V
ID4
= V
ID3
= V
ID2
= V
ID1
=0, V
ID0
= 1), C
GATE(H
) = C
GATE(L)
= 3.3nF, C
OFF
= 330pF, C
SS
= 0.1μF; Unless otherwise stated.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
Fault Protection continued
SS Comp Clamp Voltage
V
FB
= 2.7V, V
SS
= 0V
Increase V
FB
till normal off-time
0.50
0.95
1.10
V
V
FB
Low Comparator
0.9
1.0
1.1
V
I
PWM Comparator
Transient Response
V
FB
= 1.2V to 5V 500ns after GATE(H)
(after Blanking time) to
GATE(H) = (V
CC
– 1V)
to 1V
Drive V
FB
1.2V to 5V upon GATE(H)
rising edge (> V
CC
– 1V), measure
GATE(H) pulse width
115
175
ns
Minimum Pulse Width
100
200
300
ns
(Blanking Time)
I
C
OFF
Normal Off-Time
V
FB
= 2.7V
V
SS
= V
FB
= 0V
1.0
1.6
2.3
μs
Extended Off-Time
5.0
8.0
12.0
μs
I
Time-Out Timer
Time-Out Time
V
FB
= 2.7V, Measure GATE(H)
Pulse Width
V
FB
= 0V
10
30
50
μs
Fault Duty Cycle
30
50
70
%
I
Voltage Identification DAC
Accuracy
(all codes except 11111)
V
ID4
V
ID3
V
ID2
V
ID1
V
ID0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
0
1
1
0
1
1
0
1
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
Measure V
FB
= COMP, (C
OFF
= Gnd)
25
C
≤
T
J
≤
125
C, V
CC
= 12V
-1.0
1.0
%
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
3.489
3.390
3.291
3.192
3.093
2.994
2.895
2.796
2.697
2.598
2.499
2.400
2.301
2.202
2.103
2.054
2.004
1.955
1.905
3.525
3.425
3.325
3.225
3.125
3.025
2.925
2.825
2.725
2.625
2.525
2.425
2.325
2.225
2.125
2.075
2.025
1.975
1.925
3.560
3.459
3.358
3.257
3.156
3.055
2.954
2.853
2.752
2.651
2.550
2.449
2.348
2.247
2.146
2.095
2.045
1.994
1.944
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
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