參數(shù)資料
型號(hào): CS43L22-CNZ
廠商: Cirrus Logic Inc
文件頁數(shù): 44/66頁
文件大小: 0K
描述: IC DAC W/HDPN & SPKR AMPS 40QFN
標(biāo)準(zhǔn)包裝: 50
位數(shù): 24
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-QFN(6x6)
包裝: 托盤
輸出數(shù)目和類型: 2 電壓,單極
采樣率(每秒): 96k
產(chǎn)品目錄頁面: 756 (CN2011-ZH PDF)
配用: 598-1529-ND - BOARD EVAL FOR CS43L22
其它名稱: 598-1650
DS792F2
49
CS43L22
Confidential Draft
3/4/10
Notes:
1.
This setting must not change when BEEP is enabled.
2.
Beep off time will scale inversely with sample rate, Fs, but is fixed at the nominal Fs within each speed
mode.
7.16.2
Beep Volume
Sets the volume of the beep signal.
Note:
This setting must not change when BEEP is enabled.
7.17
Beep & Tone Configuration (Address 1Eh)
7.17.1
Beep Configuration
Configures a beep mixed with the HP/Line and SPK output.
Notes:
1.
When used in analog pass through mode, the output alternates between the signal from the
Passthrough Amplifier and the beep signal. The beep signal does not mix with the analog signal from
the Passthrough Amplifier.
2.
Re-engaging the beep before it has completed its initial cycle will cause the beep signal to remain ON
for the maximum ONTIME duration.
7.17.2
Beep Mix Disable
Configures how the beep mixes with the serial data input.
Note:
This setting must not change when BEEP is enabled.
BEEPVOL[4:0]
Gain
00110
+6.0 dB
00000
-6 dB
11111
-8 dB
11110
-10 dB
00111
-56 dB
Step Size:
2 dB
Application:
7
654
3
2
1
0
BEEP1
BEEP0
BEEPMIXDIS
TREBCF1
TREBCF0
BASSCF1
BASSCF0
TCEN
BEEP[1:0]
Beep Occurrence
00
Off
01
Single
10
Multiple
11
Continuous
Application:
BEEPMIXDIS
Beep Output to HP/Line and Speaker
0
Mix Enabled; The beep signal mixes with the digital signal from the serial data input.
1
Mix Disabled; The output alternates between the signal from the serial data input and the beep signal. The
beep signal does not mix with the digital signal from the serial data input.
Application:
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