參數(shù)資料
型號: CS4364-CQZ
廠商: Cirrus Logic Inc
文件頁數(shù): 33/50頁
文件大小: 0K
描述: IC DAC 103DB 24BIT 6CH 48-LQFP
標(biāo)準(zhǔn)包裝: 250
位數(shù): 24
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 模擬和數(shù)字
功率耗散(最大): 520mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 8 電壓,單極
采樣率(每秒): 216k
產(chǎn)品目錄頁面: 757 (CN2011-ZH PDF)
配用: CDB4364-ND - EVALUATION BOARD FOR CS4364
其它名稱: 598-1059
DS619F1
39
CS4364
sample rate) if the signal does not encounter a zero crossing. The zero cross function is independently
monitored and implemented for each channel.
6.8.2
Soft Volume Ramp-Up After Error (RMP_UP)
Function:
An un-mute will be performed after executing an LRCK/MCLK ratio change or error, and after changing
the Functional Mode.
When set to 1 (default), this un-mute is effected, similar to attenuation changes, by the Soft and Zero
Cross bits in the Volume and Mixing Control register.
When set to 0, an immediate un-mute is performed in these instances.
Note:
For best results, it is recommended that this feature be used in conjunction with the RMP_DN bit.
6.8.3
Soft Ramp-Down Before Filter Mode Change (RMP_DN)
Function:
If either the FILT_SEL or DEM bits are changed the DAC will stop conversion for a period of time to
change its filter values. This bit selects how the data is effected prior to and after the change of the filter
values.
When set to 1 (default), a mute will be performed prior to executing a filter mode change and an un-mute
will be performed after executing the filter mode change. This mute and un-mute are effected, similar to
attenuation changes, by the Soft and Zero Cross bits in the Volume and Mixing Control register.
When set to 0, an immediate mute is performed prior to executing a filter mode change.
Note:
For best results, it is recommended that this feature be used in conjunction with the RMP_UP bit.
6.8.4
PCM Auto-Mute (PAMUTE)
Function:
When set to 1 (default) the Digital-to-Analog converter output will mute following the reception of 8192
consecutive audio samples of static 0 or -1. A single sample of non-static data will release the mute. De-
tection and muting is done independently for each channel. The quiescent voltage on the output will be
retained and the Mute Control pin will go active during the mute period.
When set to 0 this function is disabled.
6.8.5
DSD Auto-Mute (DAMUTE)
Function:
When set to 1 (default) the Digital-to-Analog converter output will mute following the reception of 256 re-
peated 8-bit DSD mute patterns (as defined in the SACD specification).
A single bit not fitting the repeated mute pattern (mentioned above) will release the mute. Detection and
muting is done independently for each channel. The quiescent voltage on the output will be retained and
the Mute Control pin will go active during the mute period.
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