- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1991 > CS4360-KZZ (Cirrus Logic Inc)IC DAC STER 6CH 102DB 28TSSOP PDF資料下載
參數(shù)資料
| 型號： | CS4360-KZZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 17/37頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC STER 6CH 102DB 28TSSOP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 位數(shù)： | 24 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 6 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 265mW |
| 工作溫度： | -10°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 6 電壓，單極 |
| 采樣率（每秒）： | 192k |
| 產(chǎn)品目錄頁面： | 757 (CN2011-ZH PDF) |
| 其它名稱： | 598-1642 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁
CS4360
24
DS517F2
4.4.1
Stand-Alone Mode
The operational mode pins, M2 and M1, selects the 44.1 kHz de-emphasis filter. Please see section 4.1
for the desired de-emphasis control.
4.4.2
Control Port Mode
The Mode Control bits selects either the 32, 44.1, or 48 kHz de-emphasis filter. Please see section 6.1.3
for the desired de-emphasis control.
4.5
Recommended Power-up Sequence
4.5.1
Stand-Alone Mode
1) Hold RST low until the power supply and configuration pins are stable, and the master and left/right
clocks are locked to the appropriate frequencies, as discussed in section 4.2. In this state, the control
port is reset to its default settings and VQ will remain low.
2) Bring RST high. The device will remain in a low power state with VQ low and will initiate the Stand-
alone power-up sequence after approximately 512 LRCK cycles in Single-Speed Mode (1024 LRCK
cycles in Double-Speed Mode, and 2048 LRCK cycles in Quad-Speed Mode).
4.5.2
Control Port Mode
1) Hold RST low until the power supply is stable, and the master and left/right clocks are locked to the
appropriate frequencies, as discussed in section 4.2. In this state, the control port is reset to its default
settings and VQ will remain low.
2) Bring RST high. The device will remain in a low power state with VQ low.
3) Load the desired register settings while keeping the PDN bit set to 1.
4) Set the PDN bit to 0. This will initiate the power-up sequence, which lasts approximately 50 S when
the POPG bit is set to 0. If the POPG bit is set to 1, see Section 4.6 for a complete description of pow-
er-up timing.
4.6
Popguard Transient Control
The CS4360 uses a novel technique to minimize the effects of output transients during power-up and pow-
er-down. This technology, when used with external DC-blocking capacitors in series with the audio out-
puts, minimizes the audio transients commonly produced by single-ended single-supply converters. It is
activated inside the DAC when the RST pin or PDN bit is enabled/disabled and requires no other external
control, aside from choosing the appropriate DC-blocking capacitors.
4.6.1
Power-up
When the device is initially powered-up, the audio outputs, AOUTAx and AOUTBx, are clamped to GND.
Following a delay of approximately 1000 LRCK cycles, each output begins to ramp toward the quiescent
voltage. Approximately 10,000 LRCK cycles later, the outputs reach VQ and audio output begins. This
gradual voltage ramping allows time for the external DC-blocking capacitors to charge to the quiescent
voltage, minimizing the power-up transient.
4.6.2
Power-down
To prevent transients at power-down, the device must first enter its power-down state. When this occurs,
audio output ceases and the internal output buffers are disconnected from AOUTAx and AOUTBx. In their
place, a soft-start current sink is substituted which allows the DC-blocking capacitors to slowly discharge.
Once this charge is dissipated, the power to the device may be turned off and the system is ready for the
next power-on.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CS4361-CZZR | IC DAC STER 6CH 105DB 20-TSSOP |
| CS4362-KQZ | IC DAC 6CH 114DB 192KHZ 48LQFP |
| CS4362A-DQZ | IC DAC 6CH 114DB 192KHZ 48-LQFP |
| CS4364-CQZR | IC DAC 103DB 24BIT 6CH 48-LQFP |
| CS4382A-DQZ | IC DAC 8CH 114DB 192KHZ 48-LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS4360-KZZR | 功能描述:數(shù)模轉(zhuǎn)換器- DAC IC 102dB 24Bit 192kHz 6ch DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| CS4361 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:20-Pin, 24-Bit, 192 kHz, 6-Channel D/A Converter |
| CS4361_08 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:20-Pin, 24-Bit, 192 kHz, 6-Channel D/A Converter |
| CS4361-CZZ | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 6-Ch DAC 24-Bit 192kHz 105dB RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| CS4361-CZZR | 功能描述:數(shù)模轉(zhuǎn)換器- DAC IC 105dB 24-bit 192kHz 6ch DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。