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參數(shù)資料
| 型號： | CS4299-JQZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 33/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CODEC AC 97 W/SRC 48-LQFP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | SoundFusion™ |
| 類型： | 音頻編解碼器 '97 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 18 b，20 b |
| ADC / DAC 數(shù)量： | 1 / 1 |
| 三角積分調(diào)變： | 是 |
| 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： | 85 / 87 |
| 電壓 - 電源，模擬： | 4.75 V ~ 5.25 V |
| 電壓 - 電源，數(shù)字： | 4.75 V ~ 5.25 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
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CS4299
39
6.3
Miscellaneous Analog Signals
The AFLT1 and AFLT2 pins must have a 1000 pF
NPO capacitor to analog ground. These capacitors
provide a single-pole low-pass filter at the inputs to
the ADCs. This makes low-pass filters at each ana-
log input pin unnecessary.
The REFFLT pin must have a 1
F and a 0.1 F ca-
pacitor connected to analog ground with a short,
wide trace to this pin (see Figure 21 in Section 8,
Grounding and Layout, for an example). The 1
F
capacitor must not be replaced with any value high-
er than 1
F. No other connection should be made,
as any coupling onto this pin will degrade the ana-
signals should be kept away from REFFLT for sim-
ilar reasons.
The Vrefout pin is typically 2.3 V and provides a
common mode signal for single-supply external
circuits. Vrefout only supports light DC loads and
should be buffered if AC loading is needed. For
typical use the Vrefout pin should have a 1
F and
a 0.1
F capacitor connected to analog ground.
6.4
Power Supplies
The power supplies providing analog power should
be as clean as possible to minimize coupling into
the analog section which could degrade analog per-
formance. The analog power pins, AVdd1 and
AVdd2, supply power to all the analog circuitry on
the CS4299. The +5 V analog supply should be
generated from a linear voltage regulator (7805
type) connected to a +12 V supply. This helps iso-
late the analog circuitry from noise typically found
on +5 V digital supplies. A typical voltage regula-
tor
circuit
for
analog
power
using
a
MC78M05CDT +5 V regulator is shown in
Figure 19. The digital power pins, DVdd1 and
DVdd2, should be connected to the same digital
supply as the controller AC-link interface. The dig-
ital interface on the CS4299 may operate at either
+3.3 V or +5 V and proper connection of these pins
will depend on the digital power supply of the con-
troller.
6.5
Reference Design
See Section 11 for a CS4299 reference design.
Figure 19. Voltage Regulator
+12VD
AGND
DGND
+5VA
0.1F
Y5V
10F
ELEC
+
10F
ELEC
+
MC78M05CDT
OUT
3
GND
2
IN
1
0.1F
Y5V
DS319PP6
39
CS4299
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