參數(shù)資料
型號: CP2104-F03-GM
廠商: SILICON LABORATORIES
元件分類: 總線控制器
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, QCC24
封裝: 4 X 4 MM, ROHS COMPLIANT, MO-220WGGD, QFN-24
文件頁數(shù): 8/22頁
文件大?。?/td> 219K
代理商: CP2104-F03-GM
CP2104
16
Rev. 1.0
9. Voltage Regulator
The CP2104 includes an on-chip 5.0 to 3.45 V voltage regulator. This allows the CP2104 to be configured as either
a USB bus-powered device or a USB self-powered device. A typical connection diagram of the device in a bus-
powered application using the regulator is shown in Figure 8. When enabled, the voltage regulator output appears
on the VDD pin and can be used to power external devices. See Table 5 for the voltage regulator electrical
characteristics. If the regulator is used to provide VDD in a self-powered application, use the same connections
from Figure 8, but connect REGIN to an onboard 5 V supply, and disconnect it from the VBUS pin
i
Figure 8. Typical Bus-Powered Connection Diagram
Note 3
Note 2
Note 1
VBUS
D+
D-
GND
USB
Connector
To external circuitry for
USB suspend states
Standard
UART
Signals
CP2104
RI
DCD
GPIO.2
GPIO.3
GPIO.0
GPIO.1
SUSPEND
DTR
DSR
RTS
CTS
TXD
RXD
REGIN
VDD
GND
VIO
VBUS
D+
D-
RST
1
F
1-5
F
0.1
F
3.45 V Power
VIO
4.7 k
Note 1 : Avalanche transient voltage suppression diodes compatible with Full-speed USB should be
added at the connector for ESD protection. Use Littelfuse p/n SP0503BAHT or equivalent.
Note 2 : An external pull-up is not required, but can be added for noise immunity.
Note 3 : VIO can be connected directly to VDD or to a supply as low as 1.8 V to set the I/O interface
voltage.
Note 4 : If configuration ROM is to be programmed via USB, a 4.7
F capacitor must be added
between VPP and ground. During a programming operation, the pin should not be
connected to other circuitry, and VDD must be at least 3.3 V.
VPP
4.7
F
Note 4
To external circuitry for
status and control
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