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型號(hào): COPCH912
文件頁數(shù): 11/20頁
文件大?。?/td> 275K
代理商: COPCH912
Interrupts
(Continued)
lects the external interrupt edge (1 = rising edge, 0 = falling
edge). The user can get an interrupt on both rising and falling
edges by toggling the state of IEDG bit after each interrupt.
IPND and TPND bits signal which interrupt is pending. After
interrupt is acknowledged, the user can check these two bits
to determine which interrupt is pending. The user can priori-
tize the interrupt and clear the pending bit that corresponds
to the interrupt being serviced. The user can also enable GIE
at this point for nesting interrupts. Two things have to be kept
in mind when using the software interrupt. The first is that ex-
ecuting a simple RET instruction will take the program con-
trol back to the software interrupt instruction itself. In other
words, the program will be stuck in an infinite loop. To avoid
the infinite loop, the software interrupt service routine should
end with a RETSK instruction or with a JMP instruction. The
second thing to keep in mind is that unlike the other interrupt
sources, the software interrupt does not reset the GIE bit.
This means that the device can be interrupted by other inter-
rupt sources while servicing the software interrupt.
Interrupts push the PC to the stack, reset the GIE bit to dis-
able further interrupts and branch to address 00FF. The
RETI instruction will pop the stack to PC and set the GIE bit
to enable further interrupts. The user should use the RETI or
the RET instruction when returning from a hardware
(maskable) interrupt subroutine. The user should use the
RETSK instruction when returning from a software interrupt
subroutine to avoid an infinite loop situation.
The software interrupt is a special kind of non-maskable in-
terrupt which occurs when the INTR instruction (opcode 00
used to acknowledge interrupts) is fetched from ROM and
placed inside the instruction register. This may happen when
the PC is pointing beyond the available ROM address space
or when the stack is over-popped. When the software inter-
rupt occurs, the user can re-initialize the stack pointer and do
a recovery procedure (similar to reset, but not necessarily
containing all of the same initialization procedures) before
restarting.
Hardware and Software interrupts are treated differently. The
software interrupt is not gated by the GIE bit. However, it has
the lowest arbitration ranking. Also the fact that all interrupts
vector to the same address 00FF Hex means that a software
interrupt happening at the same time as a hardware interrupt
will be missed.
Note:
There is always the possibility of an interrupt occurring during an in-
struction which is attempting to reset the GIE bit or any other interrupt
enable bit. If this occurs when a single cycle instruction is being used
to reset the interrupt enable bit, the interrupt enable bit will be reset but
an interrupt may still occur. This is because interrupt processing is
started at the same time as the interrupt bit is being reset. To avoid this
scenario, the user should always use a two, three, or four cycle instruc-
tion to reset interrupt enable bits.
DETECTION OF ILLEGAL CONDITIONS
Reading of undefined ROM gets zeroes. The opcode for
software interrupt is zero. If the program fetches instructions
from undefined ROM, this will force a software interrupt, thus
signalling that an illegal condition has occurred.
Note:
A software interrupt is acted upon only when a timer or external inter-
rupt is not pending as hardware interrupts have priority over software
interrupt. In addition, the Global Interrupt bit is not set when a software
interrupt is being serviced thereby opening the door for the hardware
interrupts to occur. The subroutine stack grows down for each call and
grows up for each return. If the stack pointer is initialized to 2F Hex,
then if there are more returns than calls, the stack pointer will point to
addresses 30 and 31 (which are undefined RAM). Undefined RAM is
read as all 1’s, thus, the program will return to address FFFF. This is a
undefined ROM location and the instruction fetched will generate a
software interrupt signalling an illegal condition. The device can detect
the following illegal conditions:
1. Executing from undefined ROM
2. Over “POP”ing the stack by having more returns than calls.
Illegal conditions may occur from coding errors, “brown out”
voltage drops, static, supply noise, etc. When the software
interrupt occurs, the user can re-initialize the stack pointer
and do a recovery procedure before restarting (this recovery
program is probably similar to RESET but might not clear the
RAM). Examination of the stack can help in identifying the
source of the error. For example, upon a software interrupt,
if the SP = 30, 31 it implies that the stack was over “POP”ed
(with the SP=2F hex initially). If the SP contains a legal value
(less than or equal to the initialized SP value), then the value
in the PC gives a clue as to where in the user program an at-
tempt to access an illegal (an address over 300 Hex) was
made. The opcode returned in this case is 00 which is a soft-
ware interrupt.
The detection of illegal conditions is illustrated with an ex-
ample:
0043 CLRA
0044 RC
0045 JMP 04FF
0046 NOP
When the device is executing this program, it seemingly
“l(fā)ocks-up” having executed a software interrupt. To debug
this condition, the user takes a look at the SP and the con-
tents of the stack. The SP has a legal value and the contents
of the stack are 04FF. The perceptive user immediately real-
izes that an illegal ROM location (04FF) was accessed and
the opcode returned (00) was a software interrupt. Another
way to decode this is to run a trace and follow the sequence
of steps that ended in a software interrupt. The damaging
jump statement is changed.
DS012060-14
FIGURE 11. Interrupt Block Diagram
C
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11
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