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參數(shù)資料
| 型號： | COPC912 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 275K |
| 代理商： | COPC912 |
Functional Description
(Continued)
ers, EEPROMS etc.) and with other microcontrollers which
support the MICROWIRE interface. It consists of an 8-bit se-
rial shift register (SIO) with serial data input (SI), serial data
output (SO) and serial shift clock (SK). Figure 5 shows a
block diagram of the MICROWIRE logic.
The shift clock can be derived from either the internal source
or from an external source. Operating the MICROWIRE ar-
rangement with the internal clock source is called the Master
mode of operation. Similarly, operating the MICROWIRE ar-
rangement with an external shift clock is called the Slave
mode of operation.
The CNTRL register is used to configure and control the
MICROWIRE mode. To use the MICROWIRE, the MSEL bit
in the CNTRL register is set to one. The SK clock rate is se-
lected by the two bits, SL0 and SL1, in the CNTRL register.
The following table details the different clock rates that may
be selected.
SK Divide Clock Rates
SL1
0
0
1
SL0
0
1
x
SK
2 x tc
4 x tc
8 x tc
Where tc is the instruction cycle clock.
MICROWIRE/PLUS OPERATION
Setting the BUSY bit in the PSW register causes the
MICROWIRE/PLUS to start shifting the data. It gets reset
when eight data bits have been shifted. The user may reset
the BUSY bit by software to allow less than 8 bits to shift.
The device may enter the MICROWIRE/PLUS mode either
as a Master or as a Slave. Figure 5 shows how two micro-
controllers and several peripherals may be interconnected
using the MICROWIRE/PLUS arrangement.
WARNING:
The SIO register should only be loaded when
the SK clock is low. Loading the SIO register while the SK
clock is high will result in undefined data in the SIO register.
Setting the BUSY flag when the input SK clock is high in the
MICROWIRE/PLUS slave mode may cause the current SK
clock for the SIO shift register to be narrow. For safety, the
BUSY flag should only be set when the input SK clock is low.
Table 3 summarizes the settings required to enter the
Master/Slave modes of operations.
The table assumes that the control flag MSEL is set.
TABLE 3. MICROWIRE/PLUS G Port Configuration
G4
(SO)
Config.
Bit
1
G5
(SK)
Config.
Bit
1
G4
Pin
G5
Pin
G6
Pin
Operation
SO
Int. SK
SI MICROWIRE
Master
SI MICROWIRE
Master
0
1
TRI-STATE
Int. SK
G4
(SO)
Config.
Bit
1
G5
(SK)
Config.
Bit
0
G4
Pin
G5
Pin
G6
Pin
Operation
SO
Ext. SK
SI MICROWIRE
Slave
0
0
TRI-STATE
Ext. SK
SI MICROWIRE
Slave
MICROWIRE/PLUS MASTER MODE OPERATION
In MICROWIRE/PLUS Master mode operation, the SK shift
clock is generated internally. The MSEL bit in the CNTRL
register must be set to allow the SK and SO functions onto
the G5 and G4 pins. The G5 and G4 pins must also be se-
lected as outputs by setting the appropriate bits in the Port G
configuration register. The MICROWIRE Master mode al-
ways initiates all data exchanges. The MSEL bit in the
CNTRL register is set to enable MICROWIRE/PLUS. G4 and
G5 are selected as output.
DS012060-7
FIGURE 5. MICROWIRE/PLUS Application
C
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| COPCH912 | |
| COPCH912C | 8-BIT MICROCONTROLLER |
| COP912C | 8-Bit Microcontroller(8位微控制器) |
| CP08-127-06L | Analog IC |
| CP08-17-06L | Analog IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| COPC912C | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:COP912C/COP912CH 8-Bit Microcontroller |
| COPC922-DNG/WM/EPDB1785 | 功能描述:IC MCU 8BIT 制造商:texas instruments 系列:* 零件狀態(tài):最後搶購 標準包裝:1 |
| COPC980 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Microcontrollers |
| COPC981 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Microcontrollers |
| COPC982 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Microcontrollers |
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