13.0 Instruction Set (Continued) Jump Indirect. In this 1-byte instruction, the lower byte of the jump a" />
參數(shù)資料
型號(hào)： COP8SAC7SLB9
廠商： National Semiconductor
文件頁(yè)數(shù)： 38/62頁(yè)
文件大?。?/td> 0K
描述： IC MCU OTP 8BIT 4K 28LAMINATECSP
標(biāo)準(zhǔn)包裝： 1
系列： COP8™ 8SA
核心處理器： COP8
芯體尺寸： 8-位
速度： 10MHz
連通性： Microwire/Plus（SPI）
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 24
程序存儲(chǔ)器容量： 4KB（4K x 8）
程序存儲(chǔ)器類型： OTP
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： 0°C ~ 70°C
封裝/外殼： 28-VFQFN，CSP
包裝： 剪切帶 (CT)
其它名稱： *COP8SAC7SLB9
COP8SAC7SLB9CT
13.0 Instruction Set (Continued)
Jump Indirect. In this 1-byte instruction, the lower byte of
the jump address is obtained from a table stored in program
memory, with the Accumulator serving as the low order byte
of a pointer into program memory. For purposes of access-
ing program memory, the contents of the Accumulator are
written to PCL (temporarily). The data pointed to by the
Program Counter (PCH/PCL) is loaded into PCL, while PCH
remains unchanged.
Example: Jump Indirect
JID
Reg/
Contents
Memory
Before
After
PCU
01 Hex
PCL
C4 Hex
32 Hex
Accumulator
26 Hex
Memory
Location
32 Hex
0126 Hex
The VIS instruction is a special case of the Indirect Transfer
of Control addressing mode, where the double-byte vector
associated with the interrupt is transferred from adjacent
addresses in program memory into the Program Counter in
order to jump to the associated interrupt service routine.
13.4 INSTRUCTION TYPES
The instruction set contains a wide variety of instructions.
The available instructions are listed below, organized into
related groups.
Some instructions test a condition and skip the next instruc-
tion if the condition is not true. Skipped instructions are
executed as no-operation (NOP) instructions.
13.4.1 Arithmetic Instructions
The arithmetic instructions perform binary arithmetic such as
addition and subtraction, with or without the Carry bit.
Add (ADD)
Add with Carry (ADC)
Subtract (SUB)
Subtract with Carry (SUBC)
Increment (INC)
Decrement (DEC)
Decimal Correct (DCOR)
Clear Accumulator (CLR)
Set Carry (SC)
Reset Carry (RC)
13.4.2 Transfer-of-Control Instructions
The transfer-of-control instructions change the usual se-
quential program flow by altering the contents of the Pro-
gram Counter. The Jump to Subroutine instructions save the
Program Counter contents on the stack before jumping; the
Return instructions pop the top of the stack back into the
Program Counter.
Jump Relative (JP)
Jump Absolute (JMP)
Jump Absolute Long (JMPL)
Jump Indirect (JID)
Jump to Subroutine (JSR)
Jump to Subroutine Long (JSRL)
Return from Subroutine (RET)
Return from Subroutine and Skip (RETSK)
Return from Interrupt (RETI)
Software Trap Interrupt (INTR)
Vector Interrupt Select (VIS)
13.4.3 Load and Exchange Instructions
The load and exchange instructions write byte values in
registers or memory. The addressing mode determines the
source of the data.
Load (LD)
Load Accumulator Indirect (LAID)
Exchange (X)
13.4.4 Logical Instructions
The logical instructions perform the operations AND, OR,
and XOR (Exclusive OR). Other logical operations can be
performed by combining these basic operations. For ex-
ample, complementing is accomplished by exclusiveORing
the Accumulator with FF Hex.
Logical AND (AND)
Logical OR (OR)
Exclusive OR (XOR)
13.4.5 Accumulator Bit Manipulation Instructions
The Accumulator bit manipulation instructions allow the user
to shift the Accumulator bits and to swap its two nibbles.
Rotate Right Through Carry (RRC)
Rotate Left Through Carry (RLC)
Swap Nibbles of Accumulator (SWAP)
13.4.6 Stack Control Instructions
Push Data onto Stack (PUSH)
Pop Data off of Stack (POP)
13.4.7 Memory Bit Manipulation Instructions
The memory bit manipulation instructions allow the user to
set and reset individual bits in memory.
Set Bit (SBIT)
Reset Bit (RBIT)
Reset Pending Bit (RPND)
13.4.8 Conditional Instructions
The conditional instruction test a condition. If the condition is
true, the next instruction is executed in the normal manner; if
the condition is false, the next instruction is skipped.
If Equal (IFEQ)
If Not Equal (IFNE)
If Greater Than (IFGT)
If Carry (IFC)
If Not Carry (IFNC)
If Bit (IFBIT)
If B Pointer Not Equal (IFBNE)
And Skip if Zero (ANDSZ)
Decrement Register and Skip if Zero (DRSZ)
COP8SA
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COP8SA-EPU-2 制造商:Texas Instruments 功能描述:COP8SA EVALUATION KIT
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