VCC = +5V± 10%, GND = 0V; T
參數(shù)資料
型號(hào)： CMS82C55AZ96
廠商： Intersil
文件頁數(shù)： 11/26頁
文件大?。?/td> 0K
描述： IC I/O EXPANDER 24B 44PLCC
標(biāo)準(zhǔn)包裝： 500
接口： 可編程
輸入/輸出數(shù)： 24
中斷輸出： 無
電源電壓： 4.5 V ~ 5.5 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 44-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 44-PLCC
包裝： 帶卷 (TR)
19
FN6140.2
June 15, 2006
AC Electrical Specifications
VCC = +5V± 10%, GND = 0V; TA = Operating Temperature Range
SYMBOL
PARAMETER
TEST
CONDITIONS
82C55A
UNITS
MIN
MAX
READ TIMING
(1) tAR
Address Stable Before RD
0-
ns
(2) tRA
Address Stable After RD
0-
ns
(3) tRR
RD Pulse Width
150
-
ns
(4) tRD
Data Valid From RD
1
-
120
ns
(5) tDF
Data Float After RD
210
75
ns
(6) tRV
Time Between RDs and/or WRs
300
-
ns
WRITE TIMING
(7) tAW
Address Stable Before WR
0-
ns
(8) tWA
Address Stable After WR
20
-
ns
(9) tWW
WR Pulse Width
100
-
ns
(10) tDW
Data Valid to WR High
100
-
ns
(11) tWD
Data Valid After WR High
30
-
ns
OTHER TIMING
(12) tWB
WR = 1 to Output
1
-
350
ns
(13) tIR
Peripheral Data Before RD
0-
ns
(14) tHR
Peripheral Data After RD
0-
ns
(15) tAK
ACK Pulse Width
200
-
ns
(16) tST
STB Pulse Width
100
-
ns
(17) tPS
Peripheral Data Before STB High
20
-
ns
(18) tPH
Peripheral Data After STB High
50
-
ns
(19) tAD
ACK = 0 to Output
1
-
175
ns
(20) tKD
ACK = 1 to Output Float
2
20
250
ns
(21) tWOB
WR = 1 to OBF = 0
1
-
150
ns
(22) tAOB
ACK = 0 to OBF = 1
1
-
150
ns
(23) tSIB
STB = 0 to IBF = 1
1
-
150
ns
(24) tRIB
RD = 1 to IBF = 0
1
-
150
ns
(25) tRIT
RD = 0 to INTR = 0
1
-
200
ns
(26) tSIT
STB = 1 to INTR = 1
1
-
150
ns
(27) tAIT
ACK = 1 to INTR = 1
1
-
150
ns
(28) tWIT
WR = 0 to INTR = 0
1
-
200
ns
(29) tRES
Reset Pulse Width
1, (Note)
500
-
ns
NOTE: Period of initial Reset pulse after power-on must be at least 50
sec. Subsequent Reset pulses may be 500ns minimum.
MS82C55A, MQ82C55A, MP82C55A
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