參數(shù)資料
型號: CM8872CFI
英文描述: Telecommunication IC
中文描述: 通信集成電路
文件頁數(shù): 4/9頁
文件大小: 76K
代理商: CM8872CFI
200
1
California Micro Devices Corp. All rights reserved.
1
2
/
18
/2001
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
4
CM8870/70C
CALIFORNIA MICRO DEVICES
EVENTS
INTERDIGIT PAUSE
tID
A
TOE
St/Gt
ESt
V
IN
DECODED TONE # N+1
TONE # N
TONE # N+1
TONE # N+1
DECODED TONE # N
HIGH IMPEDANCE
DECODED TONE # n+1
VTSt
tPTE
StD
OUTPUT
DATA
OUTPUTS
Q1-Q4
tPTD
tQStD
tPStD
tGTA
tGTP
tPQ
tDP
tREC
tREC
tDO TONE DROPOUT
tDA
B
C
E
F
G
D
Explanation of Events
A. Tone bursts detected, tone duration invalid, outputs
not updated.
B. Tone #n detected, tone duration valid, tone decoded
and latched in outputs.
C. End of tone #n detected, tone absent duration valid,
outputs remain latched until next valid tone.
D. Outputs switched to high impedance state.
E. Tone #n + 1 detected, tone duration valid, tone
decoded and latched in outputs (currently high
impedance).
F. Acceptable dropout of tone #n + 1, tone absent
duration invalid, outputs remain latched.
G. End of tone #n + 1 detected, tone absent duration
valid, outputs remain latched until next valid tone.
Explanation of Symbols
V
IN
ESt
DTMF composite input signal.
Early Steering Output. Indicates detection
of valid tone frequencies.
Steering input/guard time output. Drives
external RC timing circuit.
4-bit decoded tone output.
Delayed Steering Output. Indicates that
valid frequencies have been present/absent
for the required guard time, thus constituting
a valid signal.
Tone Output Enable (input). A low level
shifts Q1-Q4 to its high impedance state.
Maximum DTMF signal duration not
detected as valid.
Minimum DTMF signal duration required
for valid recognition.
Minimum time between valid DTMF signals.
Maximum allowable drop-out during valid
DTMF signal.
Time to detect the presence of valid
DTMF signals.
Time to detect the absence of valid
DTMF signals.
Guard time, tone present.
Guard time, tone absent.
St/GT
Q1-Q4
StD
TOE
t
REC
t
REC
t
ID
t
DO
t
DP
t
DA
t
GTP
t
GTA
Timing Diagram
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