- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379898 > CLC5957 (National Semiconductor Corporation) 12-bit, 70MSPS Broadband Monolithic A/D Converter PDF資料下載
參數(shù)資料
| 型號： | CLC5957 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 12-bit, 70MSPS Broadband Monolithic A/D Converter |
| 中文描述： | 12位，70MSPS寬帶單片A / D轉換 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 631K |
| 代理商： | CLC5957 |
9
http://www.national.com
Description
The Evaluation board for the CLC5957 allows for easy
test and evaluation of the product. The part may be
ordered with all components loaded and tested. The
order number is the CLC5957PCASM. The user supplies
an analog input signal, encode signal and power to the
board and is able to take latched 12-bit digital data out of
the board.
ENCODE Input (ENC)
The ENCODE input is an SMA connector with a
termination of 50
. The encode signal is converted to an
AC coupled, differential clock signal centered between
V
CC
and ground. The user should supply a sinusoidal or
square wave signal of >200mV
pp
and <4V
pp
with a 50%
duty cycle. The duty cycle can vary from 50% if the
minimum clock pulse width times are observed. A low
jitter source will be required for IF-sampled analog input
signals to maintain best performance.
CLC5957 Clock Option
The CLC5957 evaluation board is configured for use with
an optional crystal clock oscillator source. The compo-
nent Y1 may be loaded with a ”Full-sized”, HCMOS type,
crystal oscillator.
Analog Input (AIN)
The analog input is an SMA connector with a 50
termination. The signal is converted from single to
differential by a transformer with a 5 to 260MHz band-
width and approximately one dB loss. Full scale is approx-
imately 11dBm or 2.2V
pp
. It is recommended that the
source for the analog input signal be low jitter, low noise
and low distortion to allow for proper test and evaluation
of the CLC5957.
Supply Voltages (J1 pins 31 A&B and 32 A&B)
The CLC5957PCASM is powered from a single 5V
supply connected from the referenced pins on the Euro-
card connector. The recommended supplies are low
noise linear supplies.
Digital Outputs (J1 pins 7B (MSB, D11) through 18B
(LSB) and 20B (Data Valid))
The digital outputs are provided on the Eurocard
connector. The outputs are buffered by 5V CMOS latches
with 50
series output resistors. The rising edge of Data
Valid may be used to clock the output data into data
collection cards or logic analyzers. The board has a
location for the HP 01650-63203 termination adapter
for HP 16500 logic analyzers to simplify connection to
the analyzer.
CLC5957 Evaluation Board
相關PDF資料 |
PDF描述 |
|---|---|
| CLC5957MTD | 12-bit, 70MSPS Broadband Monolithic A/D Converter |
| CLC5958SLB | 14-bit, 52MSPS A/D Converter |
| CLC5958PCASM | 14-bit, 52MSPS A/D Converter |
| CLC5958 | 14-bit, 52MSPS A/D Converter(14位52 MSPSA/D轉換器) |
| CLC935 | 12-bit, 15MSPS A/D Converter |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CLC5957_02 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit, 70MSPS Broadband Monolithic A/D Converter |
| CLC5957MTD | 制造商:Texas Instruments 功能描述:IC 12BIT ADC 70MSPS BB MONOLITHIC |
| CLC5957MTD/NOPB | 功能描述:CONV A/D 12BIT 70MSPS 48TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| CLC5957MTDX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit, 70MSPS Broadband Monolithic A/D Converter |
| CLC5957MTDX/NOPB | 功能描述:IC CONV A/D 12BIT MONO 48-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
發(fā)布緊急采購，3分鐘左右您將得到回復。