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參數(shù)資料
| 型號(hào)： | CLC5801IM |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | High Speed Low Noise Voltage Feedback Amplifier |
| 中文描述： | OP-AMP, 1000 uV OFFSET-MAX, 1800 MHz BAND WIDTH, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大小： | 462K |
| 代理商： | CLC5801IM |
Application Information
Introduction
The CLC5801 is a very wide gain-bandwidth, low noise volt-
age feedback operational amplifier which enables applica-
tions areas such as medical diagnostic ultrasound, magnetic
tape & disk storage and fiber-optics to achieve maximum
high-frequency signal-to-noise ratios. The following discus-
sion will describe the proper selection of external compo-
nents in order to achieve optimum device performance.
Bias Current Cancellation
In order to cancel the bias current errors of the non-inverting
configuration, the parallel combination of the gain-setting
(R
) and feedback (R
f
) resistors should equal the equivalent
source resistance (R
) as defined in Figure 1 Combining
this constraint with the non-inverting gain equation also seen
in Figure 1 allows both R
and R
to be determined explicitly
from the following equations: R
= A
R
and R
=
R
/(A
1). When driven from a 0
source, such as that from
the output of an op amp, the non-inverting input of the
CLC5801 should be isolated with at least a 25
series resis-
tor.
As seen in Figure 2 bias current cancellation is accom-
plished for the inverting configuration by placing a resistor
(R
) on the non-inverting input equal in value to the resis-
tance seen by the inverting input (R
|| (R
+ R
)). R
is
recommended to be no less than 25
for best CLC5801 per-
formance. The additional noise contribution of R
b
can be
minimized through the use of a shunt capacitor.
Total Input Noise vs. Source Resistance
In order to determine maximum signal-to-noise ratios from
the CLC5801, an understanding of the interaction between
the amplifier’s intrinsic noise sources and the noise arising
from its external resistors is necessary.
Figure 3describes the noise model for the non-inverting am-
plifier configuration showing all noise sources. In addition to
the intrinsic input voltage noise (e
) and current noise
(i
= i
n+
= i
n
) sources, there also exists thermal voltage
noise (
) associated with each of the external re-
sistors. Equation (1) provides the general form for total
equivalent input voltage noise density (e
). Equation (2) is a
simplification of Equation (1)that assumes R
|| R
= R
for
bias current cancellation. Figure 4 illustrates the equivalent
noise model using this assumption. Figure 5 is a plot of e
ni
against equivalent source resistance (R
seq
) with all of the
contributing noise sources of Equation (2) shown. This plot
gives the expected e
ni
for a given R
seq
which assumes R
f
||
R
g
= R
seq
for bias current cancellation. The total equivalent
output voltage noise (e
no
) is e
ni
x A
V
.
(1)
DS101307-28
FIGURE 1. Non-Inverting Amplifier Configuration
DS101307-29
FIGURE 2. Inverting Amplifier Configuration
DS101307-30
FIGURE 3. Non-Inverting Amplifier Noise Model
C
www.national.com
9
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