
Application Information
(Continued)
(2)
As seen in Figure 5 e
is dominated by the intrinsic voltage
noise (e
) of the amplifier for equivalent source resistance
below 121
. Between 121
and 5.11k
, e
is dominated by
the thermal noise (
Above 5.11k
, e
ni
is dominated by the amplifier’s current
noise (
R
). The point at which the CLC5801’s volt-
age noise and current noise contribute equally occurs for
R
seq
= 786
(
). As an example, configured with a
gain of +20V/V giving a 3dB of 90MHz and driven from an
R
seq
= 25
, the CLC5801 produces a total equivalent input
noise voltage (
) of the external resistors.
) of 26μV
rms
.
If bias current cancellation is not a requirement, then R
|| R
g
does not need to equal R
. In this case, according to Equa-
tion (1) R
|| R
should be as low as possible in order to mini-
mize noise. Results similar to Equation (1) are obtained for
the inverting configuration of Figure 2 if R
is replaced by
R
and R
is replaced by R
+ R
. With these substitutions,
Equation (1) will yield e
referred to the non-inverting input.
Referring e
ni
to the inverting input is easily accomplished by
multiplying e
ni
by the ratio of non-inverting to inverting gains.
Inverting Gains Less Than 10V/V
The lag compensation of Figure 6 will achieve stability for
lower gains. Placing the network between the two input ter-
minals does not affect the closed-loop nor noise gain, but is
best used for the inverting configuration because of its affect
on the non-inverting input impedance.
Single-Supply Operation
The CLC5801 can be operated with single power supply as
shown in Figure 7 Both the input and output are capacitively
coupled to set the DC operating point.
Low Noise Transimpedance Amplifier
Figure 8 shows a transimpedance amplifier used to amplify
the small signal from a Photodiode. Using a low noise ampli-
fier such as the CLC5801 and proper design, ensures that
the amplifier noise contribution is minimal. Here R
can be
used to compensate for the input bias current of the
CLC5801. Generally, R
is selected to be equal to R
to can-
cel the effect of I
b
flowing in each of the Op Amp input
terminals.
Figure 9 shows the equivalent noise analysis schematic for
this circuit. The complete expression for the amplifier stage
output rms noise is shown in Equation (3)
(3)
DS101307-32
FIGURE 4. Noise Model with R
f
|| R
g
= R
seq
DS101307-34
FIGURE 5. Voltage Noise Density vs. Source
Resistance
DS101307-35
FIGURE 6. External Lag Compensation
DS101307-36
FIGURE 7. Single Supply Operation
DS101307-37
FIGURE 8. Transimpedance Amplifier Configuration
C
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