參數(shù)資料
型號： CLC5632IN
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 運動控制電子
英文描述： Dual, High Output, Programmable Gain Buffer
中文描述： DUAL BUFFER AMPLIFIER, PDIP8
封裝： PLASTIC, DIP-8
文件頁數(shù)： 3/19頁
文件大?。?/td> 352K
代理商： CLC5632IN
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
-V
EE
)
Output Current (See note 4)
Common-Mode Input Voltage
Maximum Junction Temperature
Storage Temperature Range
+14V
140mA
V
EE
to V
CC
+150C
65C to +150C
Lead Temperature (Soldering 10 sec)
+300C
Operating Ratings
Thermal Resistance
Package
MDIP
SOIC
(
θ
JC
)
65C/W
50C/W
(
θ
JA
)
130C/W
145C/W
+5 Electrical Characteristics
(A
V
= +2, R
L
= 100
, V
S
= +5V (Note 5), V
CM
= V
EE
+ (V
S
/2), R
L
tied to V
CM
; Unless Specified).
Symbol
Parameter
Conditions
Typ
Min/Max Ratings
(Note 2)
+25C
Units
Ambient Temperature
CLC5632IN/IM
+25C
0 to
70C
40 to
85C
Frequency Domain Response
-3dB Bandwidth
V
O
=0.5V
PP
V
O
=2.0V
PP
V
O
=0.5V
PP
<
200MHz, V
O
=0.5V
PP
<
30MHz, V
O
=0.5V
PP
<
30MHz, V
O
= 0.5V
PP
NTSC, R
L
= 150
to
1V
NTSC, R
L
=150
to
1V
100
90
23
0
0.2
0.12
0.05
70
75
20
0.5
0.4
0.3
–
65
72
20
0.9
0.6
0.4
–
65
70
16
1.0
0.6
0.4
–
MHz
MHz
MHz
dB
dB
deg
%
0.1dB Bandwidth
Gain Peaking
Gain Rolloff
Linear Phase Deviation
Differential Gain
Differential Phase
0.15
–
–
–
deg
Time Domain Response
Rise and Fall Time
Settling Time to 0.05%
Overshoot
Slew Rate
Distortion And Noise Response
2nd Harmonic Distortion
2V Step
1V Step
2V Step
2V Step
4.8
20
5
290
6.4
24
7
170
6.8
40
11
150
7.3
60
14
140
ns
ns
%
V/μs
2V
PP
, 1MHz
2V
PP
, 1MHz; R
L
= 1k
2V
PP
, 5MHz
2V
PP
,1MHz
2V
PP
, 1MHz; R
L
= 1k
2V
PP
, 5MHz
72
77
63
85
81
66
69
75
56
82
78
60
66
72
52
79
75
58
66
72
52
79
75
58
dBc
dBc
dBc
dBc
dBc
dBc
3rd Harmonic Distortion
Equivalent Input Noise
Voltage (e
ni
)
>
1MHz
3.4
4.4
4.9
4.9
nV/
Non-Inverting Current (i
bn
)
>
1MHz
6.3
8.2
9.0
9.0
pA/
Inverting Current (i
bi
)
>
1MHz
8.7
11.3
12.4
12.4
pA/
Crosstalk (Input Referred)
Static, DC Performance
Input Offset Voltage (Note 3)
Average Drift
Input Bias Current
(Non-Inverting) (Note 3)
Average Drift
10MHz, 1V
PP
80
–
–
–
dB
13
80
5
30
–
18
35
–
24
35
–
24
mV
μV/C
μA
30
–
–
–
nA/C
C
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CLC5633IM 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Triple, High Output, Programmable Gain Buffer
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