
Application Division
Feedback Resistor
The CLC406 achieves its exceptional AC performance while
requiring very low quiescent power by using the current
feedback topology and an internal slew rate enhancement
circuit. The loop gain and frequency response for a current
feedback op amp is predominantly set by the feedback
resistor value. The CLC406 is optimized for a gain of +6 to
use a 500
feedback resistor (
for maximally flat response
at a gain of +2, use R
= 1k
).
Using lower values can lead
to excessive ringing in the pulse response while a higher
value will limit the bandwidth. Application Note OA-13 pro-
vides a more detailed discussion of choosing a feedback
resistor. A plot found within the CLC415 data sheet entitled
“Recommended R
vs. Gain” is also applicable to the
CLC406. The values of R
found on this plot will optimize the
performance of the CLC406 over its
±
1 to
±
10 gain range.
The CLC406, like all current feedback op amps, can be
operated at higher than recommended gains with an ex-
pected reduction in bandwidth.
Slew Rate and Harmonic Distortion
The current feedback topology yields an inherently high slew
rate amplifier. For this reason the CLC406 shows little differ-
ence in bandwidth between 2V
and 5V
outputs. The
dominant slew rate limiting mechanism is the unity gain
buffer used internally from the non-inverting to the inverting
inputs. Using a slew enhancement circuit to sense the onset
of slew limiting, the buffer stage momentarily increases the
quiescent current to handle high slew requirements. Slew
rates will decrease when operating the CLC406 at lower
non-inverting gains due to the increasing signal swing
through the buffer stage which is necessary to maintain a
fixed desired output swing. Conversely, slew rates are gen-
DS012747-13
FIGURE 1. Recommended Non-Inverting Gain Circuit
DS012747-14
FIGURE 2. Recommended Inverting Gain Circuit
C
www.national.com
8