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參數(shù)資料
| 型號(hào)： | CLC018 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 8 x 8 Digital Crosspoint Switch, 1.4 Gbps(8 x 8數(shù)字交點(diǎn)開(kāi)關(guān)，1.4 Gbps) |
| 中文描述： | 8 × 8數(shù)字交叉點(diǎn)開(kāi)關(guān)，1.4吉比特（8 × 8數(shù)字交點(diǎn)開(kāi)關(guān)，1.4 Gbps）的 |
| 文件頁(yè)數(shù)： | 5/17頁(yè) |
| 文件大?。?/td> | 215K |
| 代理商： | CLC018 |
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Connection Diagram
Pin Descriptions
POWER PINS
V
is the most positive rail for the data path. When the data
levels are ECL compatible, then V
should be connected to
GND. For PECL data (+5V referenced ECL), V
is con-
nected to the +5V supply. Please refer to the device opera-
tion section in this datasheet for recommendations on the
bypassing and ground/power plane requirements of this de-
vice.
V
is the most negative rail for the data path. When the data
levels are ECL compatible, then V
is connected to a 5.2V
power supply. For PECL data (+5V referenced ECL), V
EE
is
connected to GND.
V
LL
is the logic-level power supply. If the control signals are
referenced to +5V, V
LL
is connected to a +5V supply. If con-
trol signals are ECL compatible, V
LL
is connected to GND.
DATA INPUT PINS
DI0 and DI0 through DI7 and D17 are the data input pins to
the CLC018. Depending upon how the Power pins are con-
nected (please refer to the Power Pin section above) the
data may be either differential ECL, or differential PECL. To
drive the CLC018 inputs with a single-ended signal, please
refer to the section “Using Single-Ended Data” in the OP-
ERATION section of this datasheet.
DATA OUTPUT PINS
DO0 and DO0 through DO7 and DO7 are the data output
pins of the CLC018. The CLC018 outputs are differential cur-
rent outputs which can be converted to ECL or PECL com-
patible outputs through the use of load resistors. Please re-
fer to the “Output Interfacing” paragraph in the OPERATION
section of this datasheet for more details.
CONTROL PINS
IA2, IA1 and IA0 are the three bit input selection address
bus. The input port to be addressed is placed on this bus.
IA2 is the Most Significant Bit (MSB). If input port 6 is to be
addressed, IA2, IA1, IA0 should have 1, 1, 0 asserted on
them. The IA bus should be driven with CMOS levels, if V
is +5V. These levels are thus +5V referenced (standard
CMOS). If V
is connected to GND, the input levels are ref-
erenced to the 5V and GND supplies.
OA2, OA1 and OA0 are the output selection address bus.
The output port selected by the OA bus is connected to the
input port selected on the IAbus when the data is loaded into
the configuration registers. OA2 is the MSB. If OA2, OA1,
OA0 are set to 0, 0, 1; then output port 1 will be selected.
CS is an active-high chip select input. When CS is high, the
RES, LOAD, and CNFG pins will be enabled.
LOAD is the latch control for the LOAD register. When LOAD
is high, the load register is transparent. Outputs follow the
state of the IA bus, and are presented to the inputs of the
Configuration register selected by the OA bus. When LOAD
is low, the outputs of the Load register are latched.
RES is the reset control of the configuration and load regis-
ters. A high-going pulse on the RES pin programs the switch
matrix to one of two possible states: with TRI low, all outputs
are connected to input #0; with TRI high, all outputs are put
in TRI-STATE condition.
TRI will program the selected output to be in a high imped-
ance or TRI-STATE condition. To place an output in
TRI-STATE , assert a logic-high level on the TRI input when
the desired input and output addresses are asserted on the
respective address inputs and strobe the LOAD input as de-
picted in the ”Configuration Truth Table”. To enable an out-
put, assert a logic-low level on the TRI input together with the
appropriate addresses and strobe the LOAD input as previ-
ously described.
CNFG is the configuration register latch control. When
CNFG is high the Configuration register is made transparent,
and the switch matrix is set to the state loaded into the Load
registers. When CNFG is low, the state of the switch matrix
is latched.
DS100088-9
Order Number CLC018AJVJQ
See NS Package Number VJE64A
C
www.national.com
5
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