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參數(shù)資料
| 型號： | CL-PS6700 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | Low-Power PC Card Controller for the CL-PS7111 |
| 中文描述： | 低功耗PC卡控制器的CL - PS7111 |
| 文件頁數(shù)： | 17/48頁 |
| 文件大?。?/td> | 562K |
| 代理商： | CL-PS6700 |
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November 1997
17
PRELIMINARY DATA BOOK v1.0
PIN DESCRIPTIONS
C
I R R U S
L
O G I C
C
O N F I D E N T I A L
, N D A R
E Q U I R E D
CL-PS6700
Low-Power PC Card Controller
2.2.5
Card Voltages and Reset Signals
Signal
Type
Power
SourceDescription
PCM_VS[2:1]
I/O
VDDhi Single-mode. These signals inform the host system of the voltage requirements and capabilities
of the card for reading its CIS before applying power to the card. This allows 3.3-V only cards
(which need not support 5-V operation during configuration). VS[2] primarily differentiates
between 3.3- and 5-V cards, while VS[1] primarily differentiates between 3.3-V and X.X-V
cards.
These signals, and the three power control signals, are bidirectional signals under software
control (register bits) for flexibility. All five signals are capable of generating interrupts. VS[2] can
also be configured to act as the card DREQ input.
PCTL[2:0]
I/O
VDDhi Single-mode. These GPIO signals typically control the corresponding card’s power module or
switch. They determine the proper voltage for the V
CC
and/or the V
PP
pins of the socket. These
signals are directly controlled by register bits and thus, can control serially-controlled power
modules. They can also be programmed to transition to a new value automatically when the
PSLEEP_L input is asserted to automatically shut down card power in case of power fault con-
ditions. PCTL[2:0] are inputs during reset and therefore require an external pull-down or pull-up
resistor to avoid power being applied to the card socket.
PCM_RESET
O
pcm
Single-mode. This signal resets the PC Card, placing it into its default memory-only mode. The
signal remains in a high-impedance state after power-on or system reset. Cards that implement
the reset function pull up this signal with >100 k
. The CPU (after >1 ms) should pull this signal
low by writing a ‘0’ to bit 12 of the Card Interface Configuration register.
2.3
Power and Ground Pins
Signal
Group
Description
V3V_Core
core
Power to core logic; either 5 V or 3.3 V.
V3V_O
sys
Power to system interface I/O buffers; either 5 V or 3.3 V, but must be the same as the CL-PS7111
power plane (V3V_Core).
V5V_O
pcm
Power to PC Card interface I/O buffers; either 5 V, 3.3 V, or 0 V.
VDD_HI
VDDhi
This pin should be tied to the highest voltage in the system (as seen by CL-PS6700; either 5 V or 3.3
V).
VSS_Core
Ground pins for the core and input buffers.
VSS_O
Ground pins for output buffers.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CL-PS6700-VC-A | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
| CL-PS7110 | Low-Power System-on-a-Chip |
| CL-PS7111 | Low-Power System-on-a-Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CL-PS6700-VC-A | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS7110 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
| CL-PS7110-VC-A | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
| CL-PS7111 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
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