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參數(shù)資料
| 型號： | CDRH3D16 |
| 廠商： | Monolithic Power Systems, Inc. |
| 英文描述： | 1.6MHz Synchronous Step-Down plus 200mA LDO |
| 中文描述： | 1.6MHz的同步降壓型加200mA的LDO穩(wěn)壓器 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 475K |
| 代理商： | CDRH3D16 |
MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO
MP2101 Rev. 1.0
8/18/2006
www.MonolithicPower.com
3
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
2006 MPS. All Rights Reserved.
TM
ELECTRICAL CHARACTERISTICS
(4)
(continued)
V
IN1/2
= V
EN1/2
= 3.6V, T
A
= +25
°
C, unless otherwise noted.
Parameters
SW1 PFET On Resistance
SW1 NFET On Resistance
Condition
I
SW1
= 100mA
I
SW1
= –100mA
V
EN1
= 0V, V
IN
= 6V
V
SW1
= 0V or 6V
Duty Cycle = 100%,
Current Pulse Width < 1ms
Min
Typ
0.35
0.25
Max
Units
SW1 Leakage Current
–2
+2
μA
SW1 PFET Peak Current Limit
0.9
1.4
2.0
A
Oscillator Frequency
Linear Regulator LDO
IN2 Input Range
1.2
1.6
2.0
MHz
I
LOAD
= 10mA, V
OUT2
=V
FB2
T
A
= +25°C
–40°C
≤
T
A
≤
+85°C
V
FB2
= 0.6V
V
OUT2
= 0V
V
OUT
= 1.2V
I
LOAD
= 150mA, V
OUT2
= 1.2V
1.2
0.588 0.600 0.612
0.582
–50
–2
180
200
280
V
IN1
V
Regulated FB2 Voltage
0.618
+50
V
FB2 Input Bias Current
OUT2 Short Circuit Foldback
OUT2 Output Current
Dropout Voltage
(5)
nA
mA
mA
mV
Notes:
4) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization.
5) The dropout voltage is equal to V
IN2
– V
OUT2
when V
OUT2
is 100mV below the nominal value.
PIN FUNCTIONS
Pin #
1
2
Name
FB1
EN1
Description
Feedback 1. Feedback Input for the switcher output (OUT1).
Enable 1. Enable input for the switcher. Pull high to turn on the switcher; low to turn it off.
Input 1. Main input supply for both the switcher and the auxiliary low dropout (LDO) linear
regulator.
Switcher Switch Node. Output for the 800mA switcher channel.
Ground.
Input 2. Input supply for the auxiliary linear regulator LDO output power device.
Output 2. Output of the 200mA LDO. The LDO is designed to be stable with an external
μ
F ceramic capacitor at 200mA of load current.
Power On Reset Open Drain Output. A high output indicates that both outputs are within
±
10% of the regulation value. A low output indicates that the output is outside of the
±
10%
window. PWROK is pulled down if EN1 and/or EN2 is low. The PWROK window comparators
have a 50
μ
s deglitch timer for the switcher and 150
μ
s deglitch timer for the linear regulator
LDO to avoid a false trigger during load transient.
Enable 2. Enable input for the linear regulator LDO. Pull high to turn on the LDO; low to turn it
off.
Feedback 2. Feedback input for the linear regulator output (OUT2).
3
IN1
4
5
6
SW1
GND
IN2
7
OUT2
8
PWROK
9
EN2
10
FB2
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