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參數(shù)資料
| 型號： | CDP1855D |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字信號處理外設 |
| 英文描述： | 8-Bit Programmable Multiply/Divide Unit |
| 中文描述： | 8-BIT, DSP-MULTIPLIER, CDIP28 |
| 封裝： | HERMETIC SEALED, SIDE BRAZED, CERAMIC, DIP-28 |
| 文件頁數(shù)： | 6/15頁 |
| 文件大?。?/td> | 85K |
| 代理商： | CDP1855D |
4-52
RD/WE - Read/Write Enable (Input):
This signal defines whether the selected register is to be
read from or written to. In 1800 systems use MRD if MDU's
are addressed as I/O devices, MWR is used if MDU's are
addressed as memory devices.
RA2, RA1, RA0 - Register Address (Input):
These input signals define which register is to be read from
or written to. It can be seen in the “CONTROL TRUTH
TABLE” that RA2 can be used as a chip enable. It is identical
to the CE pin, except only CE controls the three-state
C.O./O.F. on the most significant MDU. In 1800 systems use
N lines if MDU's are used as I/O devices, use address lines
or function of address lines if MDU's are used as memory
devices.
Bus 0 - Bus 7 - Bus Lines:
Three-state bi-directional bus for direct interface with
CDP1800 series and other 8-bit microprocessors.
Z
R
- Z-Right:
See Pin 6.
Y
R
- Y-Right:
See Pin 5.
Cl- Carry In (Input):
This is an input for the carry from the next less significant
MDU. On the least significant MDU it must be high (V
DD
) on
all others it must be connected to the CO pin of the next less
significant MDU.
CN1, CN0 - Chip Number (Input):
These two input pins are wired high or low to indicate the
MDU position in the cascaded chain. Both are high for the
most significant MDU regardless of how many CDP1855
MDU's are used. Then CN1 = high and CN0 = low for the
next MDU and so forth.
V
SS
- Ground:
Power supply line.
V
DD
- V+:
Power supply line.
CONTROL TRUTH TABLE
INPUTS
(NOTE 1)
RESPONSE
CE
RA2
(N2)
RA1
(N1)
RA0
(N0)
RD/WE
(MRD)
STB
(TPB)
0
X
X
X
X
X
No Action (Bus Floats)
X
0
X
X
X
X
No Action (Bus Floats)
1
1
0
0
1
X
X to Bus
Increment Sequence
Counter When STB
and RD = 1
1
1
0
1
1
X
Z to Bus
1
1
1
0
1
X
Y to Bus
1
1
1
1
1
X
Status to Bus
1
1
0
0
0
1
Load X from Bus
Increment Sequence
Counter
1
1
0
1
0
1
Load Z from Bus
1
1
1
0
0
1
Load Y from Bus
1
1
1
1
0
1
Load Control Register
1
1
X
X
0
0
No Action (Bus Floats)
NOTE:
1. ( ) = 1800 System Signals. 1 = High Level, 0 = Low Level, X = High or Low Level.
CDP1855, CDP1855C
相關PDF資料 |
PDF描述 |
|---|---|
| CDP1855E | 8-Bit Programmable Multiply/Divide Unit |
| CDP1857 | 4-Bit Bus Buffer/Separator |
| CDP1857C | 4-Bit Bus Buffer/Separator |
| CDP1857CD | 4-Bit Bus Buffer/Separator |
| CDP1857CE | 4-Bit Bus Buffer/Separator |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CDP1855DX | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CDP1855E | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CDP1856CDX | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CDP1857 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:4-Bit Bus Buffer/Separator |
| CDP1857C | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:4-Bit Bus Buffer/Separator |
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