參數(shù)資料
型號: CDP1853D
廠商: INTERSIL CORP
元件分類: 通用總線功能
英文描述: N-Bit 1 of 8 Decoder
中文描述: OTHER DECODER/DRIVER, TRUE OUTPUT, CDIP16
封裝: SIDE BRAZED, CERAMIC, DIP-16
文件頁數(shù): 4/6頁
文件大小: 32K
代理商: CDP1853D
4-38
CDP1853, CDP1853C
Timing Diagrams
FIGURE 2A. CE TO OUTPUT (0-7) DELAY TIME
FIGURE 2B. N LINES TO OUTPUT (0-7) DELAY TIME
FIGURE 2C. CLOCK A TO OUTPUT (0-7) DELAY TIME
FIGURE 2D. CLOCK B TO OUTPUT (0-7) DELAY TIME
FIGURE 2. PROPAGATION DELAY TIME DIAGRAMS
FIGURE 3. TIMING DIAGRAM
FIGURE 4. N-BIT DECODER USED AS A 1 OF 8 DECODER
CE
OUTPUT
t
EO
t
EO
N
OUTPUT
t
NO
t
NO
t
AO
t
CACA
CLOCK A
OUTPUT
CLOCK B
OUTPUT
t
CBCB
t
BO
TPA
TPB
CE
EN
(NOTE 1)
OUTPUT
NOTE 1. OUTPUT ENABLED WHEN EN = HIGH
INTERNAL SIGNAL SHOWN FOR
REFERENCE ONLY (SEE FIGURE 1)
OUT 0
OUT 1
OUT 2
OUT 3
OUT 4
OUT 5
OUT 6
OUT 7
N0
N1
N2
CE
CLOCK B
CLOCK A
A
B
C
CHIP ENABLE
V
DD
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