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參數資料
| 型號： | CDP1826C |
| 廠商： | Intersil Corporation |
| 英文描述： | CMOS 64-Word x 8-Bit Static RAM |
| 中文描述： | 的CMOS 64字× 8位靜態(tài)存儲器 |
| 文件頁數： | 3/9頁 |
| 文件大?。?/td> | 42K |
| 代理商： | CDP1826C |
6-49
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage Range, (V
DD
)
(All Voltages Referenced to V
SS
Terminal)
CDP1826C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to V
DD
+0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . . .±
10mA
Power Dissipation Per Package (P
D
)
T
A
= -40
o
C to +60
o
C (Package Type E) . . . . . . . . . . . . . . 500mW
T
A
= +60
o
C to +85
o
C (Package Type E). . . . . . Derate Linearly at
12mW/
o
C to 200mW
T
A
= -55
o
C to +100
o
C (Package Type D) . . . . . . . . . . . . . 500mW
T
A
= +100
o
C to +125
o
C (Package Type D). . . . Derate Linearly at
12mW/
o
C to 200mW
Thermal Resistance (Typical)
PDIP Package . . . . . . . . . . . . . . . . . . .
Device Dissipation Per Output Transistor
T
A
= Full Package Temperature Range
(All Package Types). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mW
Operating Temperature Range (T
A
)
Package Type D. . . . . . . . . . . . . . . . . . . . . . . . . .-55
o
C to +125
o
C
Package Type E. . . . . . . . . . . . . . . . . . . . . . . . . . .-40
o
C to +85
o
C
Storage Temperature Range (T
STG
). . . . . . . . . . . .-65
o
C to +150
o
C
Lead Temperature (During Soldering)
At distance 1/16
±
1/32 In. (1.59
±
0.79mm)
from case for 10s max. . . . . . . . . . . . . . . . . . . . . . . . . . . .+265
o
C
θ
JA
(
o
C/W)
75
θ
JC
(
o
C/W)
N/A
Recommended Operating Conditions
At T
A
= Full Package Temperature Range. For maximum reliability, operating conditions
should be selected so that operation is always within the following ranges:
PARAMETER
SYMBOL
CDP1826C
UNITS
MIN
MAX
DC Operating Voltage Range
4
6.5
V
Input Voltage Range
V
SS
V
DD
V
Input Signal Rise or Fall Time, V
DD
= 5V
t
R
, t
F
-
10
μ
s
Static Electrical Specifications
At T
A
= -40
o
C to +85
o
C, V
DD
= 5V
±
5%, Except as Noted:
PARAMETER
SYMBOL
CONDITIONS
LIMITS
UNITS
V
O
(V)
V
IN
(V)
CDP1826C
MIN
(NOTE 1)
TYP
MAX
Quiescent Device Current
I
DD
-
0, V
DD
-
5
50
μ
A
Output Low (Sink) Current
BUS
I
OL
0.4
0, V
DD
1.6
3.2
-
mA
CEO
0.4
0, V
DD
0.8
1.6
-
mA
Output High (Source) Current
BUS
I
OH
V
DD
-0.4
0, V
DD
-1.0
-1.5
-
mA
CEO
V
DD
-0.4
0, V
DD
-0.6
-1.0
-
mA
Output Voltage Low-Level
V
OL
-
0, V
DD
-
0
0.1
V
Output Voltage High-Level
V
OH
-
0, V
DD
V
DD
-0.1
V
DD
-
V
Input Low Voltage
V
IL
-
-
-
-
1.5
V
Input High Voltage
V
IH
-
-
3.5
-
-
V
Input Leakage Current
I
IN
Any Input
0, V
DD
-
±
0.1
±
1
μ
A
Operating Device Current (Note 2)
I
OPER
-
0, V
DD
-
5
10
mA
Three-State Output Leakage Current
I
OUT
0, V
DD
0, V
DD
-
±
0.1
±
1
μ
A
Input Capacitance
C
IN
-
-
-
5
7.5
pF
Output Capacitance
C
OUT
-
0, V
DD
-
10
15
pF
NOTES:
1. Typical values are for T
A
= +25
o
C and nominal V
DD
.
2. Outputs open circuited; Cycle time = 1
μ
s.
CDP1826C
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