- 您現在的位置：買賣IC網 > PDF目錄379855 > CDP1822C3 (Intersil Corporation) High-Reliability CMOS 256-Word x 4-Bit LSI Static RAM PDF資料下載
參數資料
| 型號： | CDP1822C3 |
| 廠商： | Intersil Corporation |
| 英文描述： | High-Reliability CMOS 256-Word x 4-Bit LSI Static RAM |
| 中文描述： | 高可靠性的CMOS 256字× 4位LSI的靜態(tài)存儲器 |
| 文件頁數： | 5/5頁 |
| 文件大?。?/td> | 27K |
| 代理商： | CDP1822C3 |
6-23
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
http://www.intersil.com
Data Retention Specifications
PARAMETER
SYMBOL
TEST
CONDITIONS
LIMITS
UNITS
V
DR
(V)
V
DD
(V)
+25
o
C, -55
o
C
+125
o
C
MIN
MAX
MIN
MAX
Minimum Data Retention Voltage
(Note 1)
V
DR
-
-
-
2
-
2.5
V
Data Retention Quiescent Current
(Note 1)
I
DD
2
-
-
70
-
380
μ
A
Chip Deselect to Data Retention Time
t
CDR
-
5
450
-
650
-
ns
-
10
Recovery to Normal Operation Time
t
RC
5
5
450
-
650
-
ns
NOTE:
1. Limits designate 100% testing. All other limits are designer’s parameters under given test conditions and do not represent 100% testing.
FIGURE 4. LOW V
DD
DATA RETENTION TIMING WAVEFORMS
FIGURE 5. DYNAMIC/OPERATING BURN-IN CIRCUIT AND TIMING DIAGRAM
DATA RETENTION
MODE
V
DD
CS2
V
IH
V
IL
V
IL
V
IH
t
RC
0.95 V
DD
t
R
t
F
0.95 V
DD
V
DR
t
CDR
22
12
13
14
15
16
17
18
19
21
20
A2
A1
A0
A5
A6
A7
A8
V
DD
A8
A4
A9
A11
A10
01
V
DD
A8
V
DD
A8
V
DD
A3
V
DD
0
1.6
2.2
5.0
6.8
7.2
10.0
μ
s
V
DD
0
V
DD
V
DD
0
0
A1
A0
01
1
11
10
9
8
7
6
5
3
2
4
2k
R
R = 2k
±
20%
2k
R
2k
R
2k
R
PACKAGE
TEMPERATURE
125
o
C
DURATION
V
DD
7V
D
160 Hrs
CDP1822C/3
相關PDF資料 |
PDF描述 |
|---|---|
| CDP1822 | 256-Word x 4-Bit LSI Static RAM |
| CDP1822CD | 256-Word x 4-Bit LSI Static RAM |
| CDP1822CDX | 256-Word x 4-Bit LSI Static RAM |
| CDP1822CE | 256-Word x 4-Bit LSI Static RAM |
| CDP1822CEX | 256-Word x 4-Bit LSI Static RAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CDP1822CD | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256-Word x 4-Bit LSI Static RAM |
| CDP1822CD/3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| CDP1822CDX | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256-Word x 4-Bit LSI Static RAM |
| CDP1822CE | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256-Word x 4-Bit LSI Static RAM |
| CDP1822CEX | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256-Word x 4-Bit LSI Static RAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。