參數資料
型號: CDP1822C3
廠商: Intersil Corporation
英文描述: High-Reliability CMOS 256-Word x 4-Bit LSI Static RAM
中文描述: 高可靠性的CMOS 256字× 4位LSI的靜態(tài)存儲器
文件頁數: 3/5頁
文件大?。?/td> 27K
代理商: CDP1822C3
6-21
Read Cycle Dynamic Electrical Specifications
t
R
, t
F
= 10ns, C
L
= 50pF
PARAMETER
SYMBOL
V
DD
(V)
LIMITS
UNITS
+25
o
C, -55
o
C
+125
o
C
MIN
MAX
MIN
MAX
Read Cycle (Note 1)
t
RC
5
370
-
500
-
ns
Access from Address (Note 1)
t
ADA
5
-
370
-
500
ns
Output Valid from Chip Select 1 (Note 1)
t
DOA1
5
-
370
-
500
ns
Output Valid from Chip Select 2 (Note 1)
t
DOA2
5
-
370
-
500
ns
Output Active from Output Disable (Note 1)
t
DOA3
5
-
170
-
225
ns
Output Hold from Chip Select 1
t
DOH1
5
10
-
20
-
ns
Output Hold from Chip Select 2
t
DOH2
5
10
-
20
-
ns
Output Hold from Output Disable
t
DOH3
5
10
-
20
-
ns
NOTE:
1. Limits designate 100% testing. All other limits are designer’s parameters under given test conditions and do not represent 100% testing
NOTE: Minimum timing for valid data output. Longer times will initiate an
earlier but invalid output.
FIGURE 1. READ CYCLE WAVEFORMS AND TIMING DIAGRAM
FIGURE 2. MEMORY CELL CONFIGURATION
A0 - A7
CHIP
CHIP
OUTPUT
DISABLE
READ/
WRITE
DATA OUT
t
RC
t
DOH3
SELECT 2
SELECT 1
DATA OUT
VALID
HIGH
IMPEDANCE
HIGH
IMPEDANCE
t
DOA3
(NOTE 1)
t
DOA2
(NOTE 1)
t
DOA1
(NOTE 1)
t
ADA
t
DOH1
t
DOH2
WRITE
ADDRESS
DECODER
D
D
V
SS
V
DD
V
DD
READ
ADDRESS
DECODER
CDP1822C/3
相關PDF資料
PDF描述
CDP1822 256-Word x 4-Bit LSI Static RAM
CDP1822CD 256-Word x 4-Bit LSI Static RAM
CDP1822CDX 256-Word x 4-Bit LSI Static RAM
CDP1822CE 256-Word x 4-Bit LSI Static RAM
CDP1822CEX 256-Word x 4-Bit LSI Static RAM
相關代理商/技術參數
參數描述
CDP1822CD 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256-Word x 4-Bit LSI Static RAM
CDP1822CD/3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM
CDP1822CDX 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256-Word x 4-Bit LSI Static RAM
CDP1822CE 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256-Word x 4-Bit LSI Static RAM
CDP1822CEX 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256-Word x 4-Bit LSI Static RAM