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參數(shù)資料
| 型號： | CDP1806ACQ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| 中文描述： | 8-BIT, 5 MHz, MICROPROCESSOR, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 6/30頁 |
| 文件大?。?/td> | 301K |
| 代理商： | CDP1806ACQ |
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6
Minimum Set-Up And Hold Times (Note 2)
Data Bus Input Set-Up, t
SU
-100
0
ns
Data Bus Input Hold, t
H
125
225
ns
DMA Set-Up, t
SU
-75
0
ns
DMA Hold, t
H
100
175
ns
ME Set-Up, t
SU
ME Hold, t
H
125
320
ns
0
50
ns
Interrupt Set-Up, t
SU
-100
0
ns
Interrupt Hold, t
H
100
175
ns
WAIT Set-Up, t
SU
20
50
ns
EF1-4 Set-Up, t
SU
-125
0
ns
EF1 -4 Hold, t
H
175
300
ns
Minimum Pulse Width Times (Note 6)
CLEAR Pulse Width, t
WL
100
175
ns
CLOCK Pulse Width, t
W
75
100
ns
NOTES:
5. Typical values are for T
A
= 25
o
C and nominal V
DD
.
6. Maximum limits of minimum characteristics are the values above which all devices function.
Timing Specifications
as a function of T (T = 1/f
CLOCK
) at T
A
= -40 to +85
o
C, V
DD
= 5V,
±
15%
PARAMETER
CDP1805AC, CDP1806AC
UNITS
TYP
(NOTE 7)
MAX
High-Order Memory-Address Byte
Set-Up to TPA
Time, t
SU
2T-275
2T -175
ns
MRD to TPA
Time, t
SU
T/2 -100
T/2 -75
ns
High-Order Memory-Address Byte
Hold after TPA Time, t
H
T/2 +75
T/2 +100
ns
Low-Order Memory-Address Byte
Hold after WR Time, t
H
T +180
T +240
ns
CPU Data to Bus
Hold after WR Time, t
H
T +110
T +150
ns
Required Memory Access Time, t
ACC
Address to Data
4.5T -440
4.5T -330
ns
NOTE:
7. Typical values are for T
A
= +25
o
C and nominal V
DD
.
Dynamic Electrical Specifications
at T
A
= -40
o
to +85
o
C; C
L
= 50pF; Input t
R
, t
F
= 10ns; Input Pulse Levels = 0.1V to
V
DD
-0.1V; V
DD
= 5V,
±
5%.
(Continued)
PARAMETER
CDP1805AC CDP1806AC
UNITS
(NOTE 5)
TYP
MAX
CDP1805AC, CDP1806AC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CDP1806ACE | CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| CDP1806ACEX | CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| CDP1821C | High-Reliability CMOS 1024-Word x 1-Bit Static RAM |
| CDP1821C3 | High-Reliability CMOS 1024-Word x 1-Bit Static RAM |
| CDP1821CD3 | High-Reliability CMOS 1024-Word x 1-Bit Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDP1821C | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Reliability CMOS 1024-Word x 1-Bit Static RAM |
| CDP1821C/3 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Reliability CMOS 1024-Word x 1-Bit Static RAM |
| CDP1821C3 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Reliability CMOS 1024-Word x 1-Bit Static RAM |
| CDP1821CD | 制造商:Harris Corporation 功能描述: |
| CDP1821CD3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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