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參數(shù)資料
| 型號： | CDCE401 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Oscillator IC with Electronic Calibration |
| 中文描述： | 具有電子校準的振蕩器 IC |
| 文件頁數(shù)： | 8/19頁 |
| 文件大?。?/td> | 246K |
| 代理商： | CDCE401 |
www.ti.com
ENTER
REGISTER READ-BACK MODE
Similar to the
enter registerprogramming mode
sequence, the
enter register read-back mode
is written into
SDATA. Before the
enter register read-back mode
is written, the device must be disabled via EN for 100
μ
s to
ensure that the EEPROM content is read out correctly with
enter register read-back mode
. After the command
has been issued, the SDATA input is reconfigured as a clock input. By applying one clock, the EEPROM content
is read into shift registers. Now, by further applying clocks at SDATA, the EEPROM content can be clocked out
and observed at FOUT. Also, FOUT is reconfigured during that operation, as can be seen in the following figure.
There are 29 bits to be clocked out. With the 30
th
falling clock edge, the FOUT pin is reconfigured back to
normal operation.
T0044-02
0
0
1
1
1
1
1
1
2
26
27
28
SDATA
FOUT
Enter Register
Read-Back Mode
Fetch
EEPROM
Content With
1 CLK
EEPROM Content
1 Bit Available After
1 Falling Edge
30 Falling Edge
Switches Back Into
Normal Operation
Output Oscillation
Output Oscillation
CDCE401
SCAS820–JUNE 2006
Figure 4. Typical Register Read-Back Cycle
In
Table 4
, the content of the bits in the output stream is summarized. Note that the MSB is clocked out first.
Table 4. Read-Back Cycle Bit Stream
OUTPUT-STREAM BITS
Bits[0:2]
Bit[3]
FUNCTION
Revision identifier (MSB first)
EEPROM status:
0 = EEPROM has never been written.
1 = EEPROM has been programmed before.
EEPROM lock:
0 = EEPROM can be rewritten.
1 = EEPROM is locked; rewriting to the EEPROM is not possible.
Storage value, word2 (MSB first)
Storage value, word1 (MSB first)
Storage value, word0 (MSB first)
Bit[4]
Bits[5:12]
Bits[13:20]
Bits[21:28]
8
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