參數(shù)資料
型號： CDCD5704_07
廠商： Texas Instruments, Inc.
英文描述： Rambus XDR CLOCK GENERATOR
中文描述： Rambus公司的XDR時鐘發(fā)生器
文件頁數(shù)： 8/19頁
文件大?。?/td> 260K
代理商： CDCD5704_07
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
RECOMMENDED DC OPERATING CONDITIONS
CDCD5704
SCAS823–DECEMBER 2006
VALUE
–0.3 to 2.8
–0.3 to 3.6
–0.3 to V
DD
+ 0.25
–0.5 to V
DD
+ 0.5
±
20
±
50
94.4
82.8
79.1
74
31.8
68.9
125
–65 to 150
UNIT
V
V
DD
Supply voltage range
For SCL and SDA
For all other inputs
V
I
Input voltage range
(2)
V
V
O
I
IK
I
O
Output voltage range
(2)
Input clamp current, (V
I
< 0, V
I
> V
DD
)
Continuous output current
V
mA
mA
No airflow
Airflow 150 ft/min
Airflow 250 ft/min
Airflow 500 ft/min
No airflow
No airflow
R
θ
JA
Thermal resistance, junction-to-ambient
(3)
K/W
R
θ
JC
R
θ
JB
T
J
T
stg
Thermal resistance, junction-to-case
(3)
Thermal resistance, junction-to-board
(3)
Maximum junction temperature
Storage temperature range
K/W
K/W
°
C
°
C
(1)
Stresses beyond those listed under
absolute maximum rating
s may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
recommended operating
conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S1P (high-k board).
(2)
(3)
MIN
2.375
2.375
2.375
NOM
2.5
2.5
2.5
MAX
2.625
2.625
2.625
UNIT
V
V
V
°
C
V
V
V
V
V
V
V
V
V
V
V
V
DDP
V
DDC
V
DD
T
A
V
IL,CLK
V
IX,CLK
V
IH,CLKD
V
IX,CLK
V
IL SE
V
th SE
V
IH SE
V
IL L
V
IH L
V
IL SM
V
IH SM
Supply voltage for PLL
Supply voltage for core
Supply voltage for clock buffers
Operating free-air temperature
Low-level input voltage, REFCLK/REFCLKB
Crossing-point voltage, input voltage threshold, REFCLK/REFCLKB
High-level input voltage, REFCLK/REFCLKB
Difference in crossing-point voltage
Low-level, single-ended input voltage, REFCLK
Single-ended input-voltage threshold, REFCLK
(1)
High-level, single-ended input voltage, REFCLK
Low-level input voltage, ID0, ID1, EN, BYPASS
High-level input voltage, ID0, ID1, EN, BYPASS
Low-level input voltage, SCL, SDA
(2)
High-level input voltage, SCL, SDA
(2)
0
70
–0.15
0.2
0.6
0.15
0.55
0.95
0.15
–0.15
0.35
V
th SE
– 0.3
0.5 V
DD
V
th SE
+ 0.3
2.625
0.8
2.625
0.8
3.465
–0.15
1.4
–0.15
1.4
(1)
When using a single-ended clock input, V
th
is supplied to the REFCLKB pin. Duty cycle of single-ended REFCLK input is measured at
V
.
This range of SCL and SDA input high voltage allows the CDCD5704 to co-exist with 3.3 V, 2.5 V, and 1.8 V devices on the same
serial-interface bus system.
(2)
8
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CDCD5704PW 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Rambus XDR Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
CDCD5704PWG4 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Rambus XDR Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
CDCD5704PWR 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Rambus XDR Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
CDCD5704PWRG4 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Rambus XDR Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
CDCD5714DGG 制造商:Texas Instruments 功能描述:
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