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參數(shù)資料
| 型號(hào)： | CDC9449 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | PC Motherboard Clock Sythesizer/Drivers with SDRAM Clock Support(PC時(shí)鐘合成器/驅(qū)動(dòng)器(SDRAM 時(shí)鐘支持)) |
| 中文描述： | 電腦主板時(shí)鐘Sythesizer /支持與SDRAM時(shí)鐘驅(qū)動(dòng)器（電腦時(shí)鐘合成器/驅(qū)動(dòng)器（SDRAM的時(shí)鐘支持）） |
| 文件頁(yè)數(shù)： | 2/6頁(yè) |
| 文件大?。?/td> | 115K |
| 代理商： | CDC9449 |
CDC9449
PC CLOCK SYNTHESIZER/DRIVER
WITH SDRAM CLOCK SUPPORT
SCAS577 – AUGUST 1996
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
48-MHz PLL COUNTER VALUES
FREQUENCY
M
N
VCO
FREQUENCY
ACTUAL
OUTPUT
FREQUENCY
PPM
ERROR
48 MHz
17
57
48.0080 MHz
48.0080 MHz
167
Actual frequency based on a 14.31818-MHz input reference frequency
AUDIO PLL COUNTER VALUES
FREQUENCY
M
N
VCO
FREQUENCY
ACTUAL
OUTPUT
FREQUENCY
PPM
ERROR
24.576 MHz
60
103
24.5795 MHz
24.5795 MHz
144
33.8688 MHz
Actual frequency based on a 14.31818-MHz input reference frequency
41
97
33.8688 MHz
33.8680 MHz
–24
Terminal Functions
TERMINAL
NAME
TYPE
DESCRIPTION
NO.
REF(0:2)
17, 19, 20
O
14.318-MHz reference clock outputs
SBCLK(0:1)
14, 15
O
48-MHz serial bus clock outputs
FCCLK
12
O
24-MHz super I/O controller clock output
AUDIO
6
O
Audio clock output with selectable output frequency
1/2 AUDIO
7
O
1/2 audio clock output
SEL(0:1)
9, 10
I
Select control bits. These inputs provide function and frequency control for the device. A nominal
100-k
pullup resistor is internally integrated on each input.
OE
5
I
Output enable. Active high; when asserted, all outputs are enabled. When deasserted, all outputs
are placed in a high-impedance state. A nominal 100-k
pullup resistor is internally integrated.
XIN
2
I
Crystal input. The oscillator is designed for use with a 50-PPM 18-pF parallel resonant crystal. A
TTL-level clock also can drive XIN.
XOUT
3
O
Crystal output
VCC
GND
1, 8, 13, 18
Power
3.3-V core power supply
4, 11, 16
Ground
Ground
P
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