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參數(shù)資料
| 型號(hào)： | CDC339DWR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Eight Distributed-Output Clock Driver |
| 中文描述： | 八分布式輸出時(shí)鐘驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 105K |
| 代理商： | CDC339DWR |
CDC339
CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS331 – DECEMBER 1992 – REVISED MARCH 1994
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
MIN
MAX
UNIT
VCC
VIH
VIL
VI
IOH
IOL
fclock
TA
NOTE 3: Unused pins (input or I/O) must be held high or low.
Supply voltage
4.75
5.25
V
High-level input voltage
2
V
Low-level input voltage
0.8
V
Input voltage
0
VCC
–48
V
High-level output current
mA
Low-level output current
48
mA
Input clock frequency
80
MHz
°
C
Operating free-air temperature
–40
85
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIK
VOH
VOL
IIH
IIL
IOZ
IO
VCC = 4.75 V,
VCC = 4.75 V,
VCC = 4.75 V,
VCC = 5.25 V,
VCC = 5.25 V,
VCC = 5.25 V,
VCC = 5.25 V,
II = –18 mA
IOH = – 48 mA
IOL = 48 mA
VI = 2.7 V
VI = 0.5 V
VO = 2.7 V or 0.5 V
VO = 2.5 V
–1.2
V
2
V
0.5
V
μ
A
μ
A
μ
A
mA
50
–50
±
50
–180
–50
VCC = 5.25 V,
VI= VCCor GND
VI = VCC or GND
5 25 V
IO = 0,
Outputs high
70
ICC
Outputs low
85
mA
Outputs disabled
70
Ci
Co
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
3
pF
8
pF
All typical values are at VCC = 5 V, TA = 25
°
C.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature
MIN
MAX
UNIT
fclock
Clock frequency
80
MHz
CLR low
4
tw
Pulse duration
CLK low
4
ns
CLK high
CLR inactive before CLK
↑
4
tsu
Setup time
2
ns
Clock duty cycle
40%
60%
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