參數(shù)資料
型號: CDC328ADB
廠商: Texas Instruments, Inc.
元件分類: 8位微控制器
英文描述: ECONOLINE: RSZ/P - 1kVDC
中文描述: ECONOLINE:RSZ / P - 1kVDC 2kVDC隔離UL94V - 0封裝材料所需的散熱片,無外置。組件所需的環(huán)形磁ContinuousShort電路保護(/ P的后綴)
文件頁數(shù): 6/7頁
文件大小: 101K
代理商: CDC328ADB
CDC328A
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY
SCAS327B – DECEMBER 1992 – REVISED NOVEMBER 1995
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
tPLH1
2Y2
2Y1
2T/C
1Y2
1Y1
1T/C
A
tPHL1
tPLH5
tPHL5
tPLH2
tPHL2
tPLH6
tPHL6
tPLH3
tPHL3
tPHL7
tPLH7
tPLH4
tPHL4
tPHL8
tPLH8
NOTES: A. Output skew, tsk(o), from A to any Y (same phase), can be measured only between outputs for which the respective polarity-control
inputs (T/C) are at the same logic level. It is calculated as the greater of:
– The difference between the fastest and slowest of tPLH from A
to any Y (e.g., tPLHn, n = 1 to 4; or tPLHn, n = 5 to 6)
– The difference between the fastest and slowest of tPHL from A
to any Y (e.g., tPHLn, n = 1 to 4; or tPHLn, n = 5 to 6)
– The difference between the fastest and slowest of tPLH from A
to any Y (e.g., tPLHn, n = 7 to 8)
– The difference between the fastest and slowest of tPHL from A
to any Y (e.g., tPHLn, n = 7 to 8)
B. Output skew, tsk(o), from A to any Y (any phase), can be measured between outputs for which the respective polarity-control inputs
(T/C) are at the same or different logic levels. It is calculated as the greater of:
– The difference between the fastest and slowest of tPLH from A
to any Y or tPHL from A
to any Y (e.g., tPLHn, n = 1 to 4;
or tPLHn, n = 5 to 6, and tPHLn, n = 7 to 8)
– The difference between the fastest and slowest of tPHL from A
to any Y or tPLH from A
to any Y (e.g., tPHLn, n = 1 to 4;
or tPHLn, n = 5 to 6, and tPLHn, n = 7 to 8)
C. Pulse skew, tsk(p), is calculated as the greater of
tPLHn - tPHLn
(n = 1, 2, 3, 4, 5, 6 ,7, 8).
Figure 2. Waveforms for Calculation of t
sk(o)
, t
sk(p)
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