參數(shù)資料
型號: CDC222
廠商: Texas Instruments, Inc.
英文描述: 1-Line To 15-Line Differential Clock Driver(1-15線差分時鐘驅(qū)動器)
中文描述: 1線15線差分時鐘驅(qū)動器(1-15線差分時鐘驅(qū)動器)
文件頁數(shù): 1/7頁
文件大小: 142K
代理商: CDC222
CDC222
1-LINE TO 15-LINE DIFFERENTIAL CLOCK DRIVER
SCAS548A – NOVEMBER 1995 – REVISED JUNE 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Low Output Skew for Clock-Distribution
and Clock-Generation Applications
Differential Low-Voltage Pseudo-ECL
(LVPECL)-Compatible Inputs and Outputs
Distributes Differential Clock Inputs to 15
Differential Clock Outputs
Output Reference Voltage, V
REF
, Allows
Distribution From a Single-Ended Clock
Input
Outputs Configurable to Provide 1X or 1/2X
Input Reference Frequency
Single-Ended LVPECL-Compatible Output
Enable
Packaged in 52-Pin Thin Quad Flat Package
PAH PACKAGE
(TOP VIEW)
V
CCO
QC0
QCO
QC1
QC1
QC2
QC2
QC3
QC3
V
CCO
NC
NC
V
CCO
39
38
37
36
35
34
33
32
31
30
29
28
27
1
2
3
4
5
6
7
8
9
10
11
12
13
V
CC
MR
SELA
SELB
CLK0
CLK0
CLK_SEL
CLK1
CLK1
V
BB
SELC
SELD
GND
51 50 49 48 47
52
46
44 43 42
45
41 40
Q
NC – No internal connection
15 16 17 18 19 20 21 22 23 24 25 26
14
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
V
C
V
C
V
C
V
C
description
The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs (CLKIN,
CLKIN) to fifteen pairs of differential clock (Y, Y) outputs with minimum skew for clock distribution. It is specifically
designed for driving 50-
transmission lines.
When the master reset (MR) input is in the low state, the 15 differential ouputs switch at the same or one-half
the frequency of the differential clock inputs. When MR is in the high state, the 15 differential outputs are forced
to static states (Y outputs in the low state, Y outputs in the high state), and the divide-by-two outputs are reset.
MR is latched on the negative-edge of the CLKIN input so that the Q outputs are always disabled in the low state.
The four output banks are configured as a bank of two, a bank of three, a bank of four, and a bank of six. Each
bank may be configured to provide either same-frequency of half-frequency outputs via the SEL inputs.
The voltage-reference (V
BB
) output can be strapped to CLKIN for a single-ended CLKIN input.
The CDC222 is characterized for operation from 0 C to 70 C.
Copyright
1996, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
P
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