參數(shù)資料
型號： CD54HC4059
廠商： Texas Instruments, Inc.
元件分類： 通用總線功能
英文描述： High-Speed CMOS Logic CMOS Programmable Divide-by-N Counter
中文描述： 高速CMOS邏輯CMOS可編程分頻氮計數(shù)器
文件頁數(shù)： 6/12頁
文件大小： 209K
代理商： CD54HC4059
6
Test Circuits and Waveforms
NOTE: Outputs should be switching from 10% V
CC
to 90% V
CC
in
accordance with device truth table. For f
MAX
, input duty cycle = 50%.
FIGURE 2. HC CLOCK PULSE RISE AND FALL TIMES AND
PULSE WIDTH
FIGURE 3. HC TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
FIGURE 4. HC SETUP TIMES, HOLD TIMES, REMOVAL
TIME, AND PROPAGATION DELAY TIMES FOR EDGE
TRIGGERED SEQUENTIAL LOGIC CIRCUITS
CLOCK
90%
50%
10%
GND
V
CC
t
r
C
L
t
f
C
L
50%
10%
50%
t
WL
t
WH
t
WL
+ t
WH
=fC
L
I
t
PHL
t
PLH
t
THL
t
TLH
90%
50%
10%
50%
10%
INVERTING
OUTPUT
INPUT
GND
V
CC
t
r
= 6ns
t
f
= 6ns
90%
t
r
C
L
t
f
C
L
GND
V
CC
50%
GND
V
CC
50%
90%
10%
GND
CLOCK
INPUT
DATA
INPUT
t
SU(H)
OUTPUT
SET, RESET
OR PRESET
V
CC
50%
90%
10%
50%
90%
t
REM
t
PLH
t
TLH
t
THL
t
H(L)
t
PHL
IC
C
L
50pF
t
SU(L)
t
H(H)
CD54HC4059, CD74HC4059
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