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參數(shù)資料
| 型號(hào)： | CD4018BMS |
| 廠(chǎng)商： | Intersil Corporation |
| 元件分類(lèi)： | 通用總線(xiàn)功能 |
| 英文描述： | CMOS Presettable Divide-By- “N” Counter |
| 中文描述： | 的CMOS可預(yù)置分頻器的“N”反 |
| 文件頁(yè)數(shù)： | 9/9頁(yè) |
| 文件大?。?/td> | 85K |
| 代理商： | CD4018BMS |
358
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
http://www.intersil.com
CD4018BMS
FIGURE 12. EXTERNAL CONNECTIONS FOR DIVIDE BY 10, 9,
8, 7, 6, 5, 4, 3, 2 OPERATION
EXTERNAL CONNECTIONS FOR DIVIDE BY 10, 9, 8, 7, 6, 5, 4, 3,
OPERATION
DIVIDE BY 10 Q5
Connected
Back To “Data”
No External Components
Required
DIVIDE BY 8
Q4
Connected
Back To “Data”
No External Components
Required
DIVIDE BY 6
Q3
Connected
Back To “Data”
No External Components
Required
DIVIDE BY 4
Q2
Connected
Back To “Data”
No External Components
Required
DIVIDE BY 2
Q1
DIVIDE BY 9
Q4
Q5
1/2 CD4011B
CONNECTED BACK TO “DATA”
(SKIPS “ALL-I’s” STATE)
DIVIDE BY 7
Q3
Q4
1/2 CD4011B
CONNECTED BACK TO “DATA”
(SKIPS “ALL-I’s” STATE)
DIVIDE BY 5
Q2
Q3
1/2 CD4011B
CONNECTED BACK TO “DATA”
(SKIPS “ALL-I’s” STATE)
DIVIDE BY 3
Q1
Q2
1/2 CD4011B
CONNECTED BACK TO “DATA”
(SKIPS “ALL-I’s” STATE)
FIGURE 13. EXAMPLE OF DIVIDE BY 7
Chip Dimensions and Pad Layout
D
R
CL
Q3 Q4
J1 J2 J3 J4 J5
CL
÷
7
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
as indicated. Grid graduations are in mils (10
-3
inch)
METALLIZATION:
Thickness: 11k
14k
, AL.
10.4k - 15.6k
, Silane
PASSIVATION:
BOND PADS:
0.004 inches X 0.004 inches MIN
DIE THICKNESS:
0.0198 inches - 0.0218 inches
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CD4018BPWR | CMOS PRESETTABLE DIVIDE-BY-N COUNTER |
| CD4018 | CMOS 4 Bit Arithmetic Logic Unit |
| CD40192BC | Synchronous 4-Bit Up/Down Decade Counter(同步4位十進(jìn)制加/減計(jì)數(shù)器) |
| CD40193BC | Synchronous 4-Bit Up/Down Binary Counter(同步4位二進(jìn)制加/減計(jì)數(shù)器) |
| CD40192BMS | CMOS Presettable Up/Down Counters (Dual Clock With Reset)(CMOS可預(yù)置加/減計(jì)數(shù)器（帶復(fù)位的雙時(shí)鐘）) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CD4018BMT | 功能描述:計(jì)數(shù)器 IC CMOS Presettable Divide-By-N Counter RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類(lèi)型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4018BMTE4 | 功能描述:計(jì)數(shù)器 IC CMOS Presettable Divide-By-N Counter RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類(lèi)型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4018BMTG4 | 功能描述:計(jì)數(shù)器 IC CMOS Presettable Divide-By-N Counter RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類(lèi)型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4018BMW | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Johnson Counter |
| CD4018BMW/883 | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Johnson Counter |
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