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參數(shù)資料
| 型號(hào)： | CD4017BMS, |
| 廠商： | Intersil Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | CMOS Counter/Dividers(CMOS計(jì)數(shù)器/驅(qū)動(dòng)器) |
| 中文描述： | 的CMOS計(jì)數(shù)器/分頻器（的CMOS計(jì)數(shù)器/驅(qū)動(dòng)器） |
| 文件頁(yè)數(shù)： | 9/10頁(yè) |
| 文件大小： | 157K |
| 代理商： | CD4017BMS, |
9
When the N
th
decoded output is reached (N
th
clock pulse) the
S-R flip-flop (constructed from two NOR gates of the CD4001B)
generates a reset pulse which clears the CD4017BMS or
CD4022BMS to its zero count. At this time, if the N
th
decoded
output is greater than or equal to 6 in the CD4017BMS or 5 in
the CD4022BMS, the C
OUT
line goes high to clock the next
CD4017BMS or CD4022BMS counter section. The “0”
decoded output also goes high at this time. Coincidence of the
clock low and decoded “0” output low resets the S-R flip-flop to
enable the CD4017BMS or CD4022BMS. If the N
th
decoded
output is less than 6 (CD4017BMS) or 5 (CD4022BMS), the
C
OUT
line will not go high and, therefore, cannot be used. In
this case “0” decoded output may be used to perform the clock-
ing function for the next counter.
FIGURE 11. TYPICAL PROPAGATION DELAY TIME AS A
FUNCTION OF LOAD CAPACITANCE
(CLOCK TO CARRY OUT)
FIGURE 12. TYPICAL DYNAMIC POWER DISSIPATION AS A
FUNCTION OF CLOCK INPUT FREQUENCY
FIGURE13. PROPAGATIONDELAY,SETUP,ANDRESET
REMOVAL TIME WAVEFORMS
FIGURE 14. DIVIDE BY N COUNTER (N
≤
10) WITH N DECODED
OUTPUTS
FIGURE 15. CASCADING THE CD4017BMS
Typical Performance Characteristics
(Continued)
SUPPLY VOLTAGE (VDD) = 5V
AMBIENT TEMPERATURE (T
A
) = +25
o
C
10V
15V
700
600
500
400
300
200
100
0
10
20
30
40
50
60
70
80
90
100
LOAD CAPACITANCE (CL) (pF)
P
1
10
10
2
10
3
10
4
CLOCK INPUT FREQUENCY (fCL) (kHz)
10
5
10
10
2
10
3
10
4
10
5
P
μ
W
CL = 50pF
CL = 15pF
LOAD CAPACITANCE
SUPPLY VOLTAGE
(VDD) = 15V
10V
5V
10V
AMBIENT TEMPERATURE (T
A
) = +25
o
C
INPUT tr = tf = 20ns
CLOCK
CLOCK
INHIBIT
RESET
DECODE
1-9
DECODE
“0” OR
CARRY
OUTPUT
OUTPUT
TS
TPLH
TPHL
TPHL
TPRHL
TPRLH
Delays Measured Between 50% levels on All Waveforms
CD4017BMS
OR
CD4022BMS
1
2
. . .
N
N DECODED
OUTPUTS
0
CLOCK
CLOCK
INHIBIT
C
OUT
FOR N
≥
6
f = CLOCK
÷
N
ALTERNATE C
OUT
FOR N = 2 TO 10
f = CLOCK
N
O DECODED
OUTPUTS
CD4017BMS
Q1
. . .
C
CE
Q0
Q8
Q9
R
CD4017BMS
Q1
. . .
C
CE
Q0
Q8
Q9
R
CD4017BMS
Q1
. . .
C
CE
Q0
Q8
Q9
R
9 DECODED
OUTPUTS
CLOCK
INTERMEDIATE STAGE
8 DECODED
OUTPUTS
8 DECODED
OUTPUTS
LAST STAGE
FIRST STAGE
CD4017BMS, CD4022BMS
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| CD4017BMW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Johnson Counter |
| CD4017BMW/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Johnson Counter |
| CD4017BNSR | 功能描述:計(jì)數(shù)器 IC 10 Decade/Divider RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4017BNSRE4 | 功能描述:計(jì)數(shù)器 IC 10 Decade/Divider RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4017BNSRG4 | 功能描述:計(jì)數(shù)器 IC CMOS Decade Counter RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
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